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54 Commits

Author SHA1 Message Date
Daniel Vetter
b75451838a tests/gem_*_blits: reduce buffer count to not trash swap 
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-10-15 13:23:03 +02:00
Jesse Barnes
503cfa2707 Treat PPT like CPT as we do in the kernel 
Set the pch type to CPT if we detect a PPT as well.
 2011-10-10 11:24:42 -07:00
Paulo Zanoni
ca2800f1d4 drm_open_any: explain why we are abort()ing 
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: pimped error msg]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-09-15 19:39:25 +02:00
Daniel Vetter
bf9f149a6d tools: add intel_gen 
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-09-12 20:39:45 +02:00
Daniel Vetter
61b9806f4e tests: basic ring<->cpu and ring<->ring tests 
Using a dummy reloc that doesn't matter to trick the kernel into
synchroizing the rings.

v2: properly apply MI_NOOP workaround to MI_FLUSH_DW and
switch to MI_COND_BATCH_BUFFER_END as a dummy command on the
render ring to avoid PIPE_CONTROL errata.

v3: somebody clever decided that in C, you cound from 1,
i.e. I915_EXEC_RENDER == 1. It works now ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-09-12 09:39:16 +02:00
Daniel Vetter
d42b7f9189 lib/batch: hackish interface to run batches on specific rings 
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-09-09 17:24:16 +02:00
Ben Widawsky
d0a7e0ab5a tools/range handing: forgot the register map file :( 2011-07-28 15:07:36 -07:00
Ben Widawsky
62873796c4 intel-gpu-tools/debugging: shader debugger 
high level summary of the files:
  * debug_rdata - get current state from debug registers. Helpful
    when developing the debugger, and could serve some purpose in the
    future.
  * eudb - the debugger itself
  * eviction_macro - generate the proper macro to flush the EU render
    cache until I get control flow working
  * pre_cpp - an evaluating c preprocesser like thing, to be used before
    cpp
  * sr - the system routine, exception handler which runs on the EU
  * test - a very basic test system routine
  * debug.h
 2011-07-28 14:26:57 -07:00
Ben Widawsky
e39b13d7e4 intel-gpu-tools/debugging: add important debug regs 
Cc: Chris Wilson <chris@chris-wilson.co.uk>
 2011-07-28 13:52:28 -07:00
Ben Widawsky
abd7038e5a intel-gpu-tools/range handling: register range handling 
Hooks to allow safe accesses from userspace. Can revert to old behavior
by using unsafe access.
 2011-07-28 13:48:51 -07:00
Ben Widawsky
cac8f8b526 forcewake: Add mmio code to do proper forcewake stuff for gen6 2011-07-28 13:48:51 -07:00
Chris Wilson
719ffef7c3 gem_stress: Add render copyfunc for SandyBridge 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-05-24 22:08:48 +01:00
Eric Anholt
d73cdde45a Add Ivybridge support to intel_gpu_dump and the BLT tests. 2011-05-17 17:54:26 -07:00
Jesse Barnes
a09dd09e00 Add Ivybridge device IDs 
Makes the reg dumper work better.
 2011-05-10 17:21:12 -07:00
Daniel Vetter
4fcfc9f102 gem_stress: gen2 render copy 
Sometimes acts up like gen3 on my i855gm. Sometimes works flawless.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-04-04 22:03:44 +02:00
Daniel Vetter
cd640cca6c gem_stress: render copy on gen3 
Headers copied over from xf86-video-intel, code built after the Xrender
support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-03-29 22:52:50 +02:00
Daniel Vetter
8ab88c9af0 lib: execbuffer2 support 
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-03-29 22:49:09 +02:00
Daniel Vetter
ad515f817a Move gen5 blitter work-around to lib 
Suggested by Chris Wilson to prevent utterly strange gpu hangs.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2011-03-25 22:09:28 +01:00
Chris Wilson
41570d9bf5 Remove confusing use of IS_9XX 
... and test for what we mean instead.

Reported-by: Diego Celix <dcelix@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-14 15:57:40 +00:00
Chris Wilson
0e50b972de Fix typo excluding Ironlake from IS_INTEL 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-06 10:12:42 +00:00
Chris Wilson
3c5c8ba71c Search for the first Intel dri device. 
This is vital in a multi-GPU system so that we only test the Intel card
and not the discrete GPUs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 13:37:04 +00:00
Chris Wilson
371f87f2d8 Exercise the whole aperture with tiled blits 
After full-gtt, gem_tiled_blits doesn't allocate enough to force
eviction. So query the total aperture and accommodate.

Also introduce a similar test that utilizes fences rather than
use the BLT to perform the tiling and detiling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 10:56:46 +00:00
Eric Anholt
253acc34af intel_disable_clock_gating: New tool for turning off clock gating on ILK. 
This is something I sometimes want to do in testing, to see if a
mystery bug (say, 29172) is due to broken clock gating.  Sadly, in
this case it isn't.  Note that it isn't supported on non-ILK chipsets
yet.
 2010-12-16 16:48:29 -08:00
Chris Wilson
d4d769a432 Prepare for split BLT ring on Sandybridge. 
Depends on libdrm 057fab3382c02af54126ce395c43d4e6dce9439a

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31123
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-10-26 11:46:52 +01:00
Zhenyu Wang
b95893820f Add all sandybridge device ids 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-09-27 13:35:36 +08:00
Jesse Barnes
7ab19ae6fe intel_reg_dumper: eDP port is on the CPU, not PCH 
Made me think there was another register until I checked the offset.
 2010-09-20 14:37:07 -07:00
Chris Wilson
c09fa38c01 reg dumper: Dump ILK panel fitting control debug registers 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-09-05 12:05:52 +01:00
Jesse Barnes
b1e839d026 intel_reg_dumper: add some 945 MI reg dumping 2010-06-30 02:02:49 -07:00
Zhenyu Wang
eae80edbb3 reg dump update for SNB/CPT 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-04-15 15:25:07 +08:00
Zhenyu Wang
2b40fc83d1 Add PCH chipset type check for Cougarpoint 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-04-15 15:24:58 +08:00
Chris Wilson
95374225e8 Enable compilation on non-Intel, non-DRM systems. 
A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-04-08 12:17:31 +01:00
Adam Jackson
cd64e19329 intel_reg_dumper: Add support for reading register dumps from files 
Also add intel_reg_snapshot for creating such snapshots, and relevant
documentation.

Signed-off-by: Adam Jackson <ajax@redhat.com>
 2010-04-05 11:41:24 -04:00
Eric Anholt
7682c42809 Fix INSTDONE1 bits on g4x, and use those on Ironlake too. 2010-03-24 12:01:38 -07:00
Eric Anholt
b0ddd0688c Add Ironlake INSTDONE bits. 2010-03-24 12:01:38 -07:00
Eric Anholt
291a576d72 Add support for Sandybridge INSTDONE regs. 2010-02-25 10:41:49 -08:00
Eric Anholt
67736dbc94 Add support for Sandybridge mobile chipset. 2010-02-25 10:41:49 -08:00
Eric Anholt
613d1c4896 Add some initial definitions for Sandybridge. 2010-02-25 10:41:49 -08:00
Zhao Yakui
7daa481bb7 reg_dump: Dump display port register on Ironlake 
Dump the display port register on Ironlake.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
 2010-01-15 14:38:34 -08:00
Wu Fengguang
9e9c9f24f5 Add: tools/intel_audio_dump 
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
 2009-11-06 14:01:57 +08:00
Eric Anholt
40bff5071c Add intel_gpu_dump from the 2D driver. 2009-10-06 17:49:05 -07:00
Xiang, Haihao
bbebf6b1c9 Add support for new chips 
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
 2009-09-08 09:41:48 +08:00
Eric Anholt
56bdcd1d6b Add INSTDONE bits for 830-865. 2009-09-04 12:19:25 -07:00
Eric Anholt
3904b7c6a2 intel_gpu_top: Move instdone bit definitions to lib to share with _dump. 2009-06-30 18:04:50 -07:00
Eric Anholt
a18af8ed43 Add more 965 INSTDONE bits. 
This shows off the units that are stuck busy in the ut2004 hang.
 2009-06-23 17:18:52 -07:00
Jesse Barnes
bbafc3d0bf Four new tests for error handling 
Add four new tests for error the error handling cases:
  - gem_bad_address - store to a bad address, should generate a protection or
    page table error
  - gem_bad_batch - try to execute a bad batch, should generate a protection,
    invalid instruction or page table error
  - gem_bad_blit - blit to an invalid location, should generated a protection
    or page table error
  - gem_hang - hang the GPU on an event that will never happen, test hang
    detection & recovery code
 2009-06-18 18:10:23 -07:00
Eric Anholt
593a47f00e intel_gpu_dump: Get the devid so we can decode correctly on gen4. 2009-04-12 15:57:07 -07:00
Eric Anholt
b51588b9bd Fix warning about assert in intel_batchbuffer.h 2009-04-07 19:07:18 -07:00
Eric Anholt
cd9ba0a3b6 Add a test for pread after blitting to an object. 
This caught a bug with get_user_pages usage in the kernel, which would
result in zeroes being read out of the object when faulting in a new page.
 2009-04-07 19:06:33 -07:00
Eric Anholt
3b301df9ec Add a regression test for tiled object blitting. 2009-04-03 14:23:06 -07:00
Eric Anholt
614b165c60 Add intel_chipset.h to fix dist. 2009-03-30 19:08:43 -07:00