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https://github.com/tiagovignatti/intel-gpu-tools.git
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Add support for Sandybridge INSTDONE regs.
This commit is contained in:
Eric Anholt
parent
67736dbc94
commit
291a576d72
@ -58,10 +58,90 @@ gen4_instdone1_bit(uint32_t bit, const char *name)
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add_instdone_bit(INST_DONE_1, bit, name);
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}
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static void
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gen6_instdone1_bit(uint32_t bit, const char *name)
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{
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add_instdone_bit(GEN6_INSTDONE_1, bit, name);
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}
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static void
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gen6_instdone2_bit(uint32_t bit, const char *name)
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{
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add_instdone_bit(GEN6_INSTDONE_2, bit, name);
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}
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void
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init_instdone_definitions(void)
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{
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if (IS_965(devid)) {
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if (IS_GEN6(devid)) {
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/* Now called INSTDONE_1 in the docs. */
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 3");
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gen6_instdone1_bit(GEN6_EU_32_DONE, "EU 32");
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gen6_instdone1_bit(GEN6_EU_31_DONE, "EU 31");
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gen6_instdone1_bit(GEN6_EU_30_DONE, "EU 30");
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 2");
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gen6_instdone1_bit(GEN6_EU_22_DONE, "EU 22");
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gen6_instdone1_bit(GEN6_EU_21_DONE, "EU 21");
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gen6_instdone1_bit(GEN6_EU_20_DONE, "EU 20");
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 1");
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gen6_instdone1_bit(GEN6_EU_12_DONE, "EU 12");
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gen6_instdone1_bit(GEN6_EU_11_DONE, "EU 11");
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gen6_instdone1_bit(GEN6_EU_10_DONE, "EU 10");
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 0");
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gen6_instdone1_bit(GEN6_EU_02_DONE, "EU 02");
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gen6_instdone1_bit(GEN6_EU_01_DONE, "EU 01");
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gen6_instdone1_bit(GEN6_EU_00_DONE, "EU 00");
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gen6_instdone1_bit(GEN6_IC_3_DONE, "IC 3");
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gen6_instdone1_bit(GEN6_IC_2_DONE, "IC 2");
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gen6_instdone1_bit(GEN6_IC_1_DONE, "IC 1");
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gen6_instdone1_bit(GEN6_IC_0_DONE, "IC 0");
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gen6_instdone1_bit(GEN6_ISC_10_DONE, "ISC 1/0");
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gen6_instdone1_bit(GEN6_ISC_32_DONE, "ISC 3/2");
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gen6_instdone1_bit(GEN6_VSC_DONE, "VSC");
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gen6_instdone1_bit(GEN6_IEF_DONE, "IEF");
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gen6_instdone1_bit(GEN6_VFE_DONE, "VFE");
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gen6_instdone1_bit(GEN6_TD_DONE, "TD");
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gen6_instdone1_bit(GEN6_TS_DONE, "TS");
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gen6_instdone1_bit(GEN6_GW_DONE, "GW");
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gen6_instdone1_bit(GEN6_HIZ_DONE, "HIZ");
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gen6_instdone1_bit(GEN6_AVS_DONE, "AVS");
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/* Now called INSTDONE_2 in the docs. */
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gen6_instdone2_bit(GEN6_GAM_DONE, "GAM");
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gen6_instdone2_bit(GEN6_CS_DONE, "CS");
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gen6_instdone2_bit(GEN6_WMBE_DONE, "WMBE");
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gen6_instdone2_bit(GEN6_SVRW_DONE, "SVRW");
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gen6_instdone2_bit(GEN6_RCC_DONE, "RCC");
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gen6_instdone2_bit(GEN6_SVG_DONE, "SVG");
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gen6_instdone2_bit(GEN6_ISC_DONE, "ISC");
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gen6_instdone2_bit(GEN6_MT_DONE, "MT");
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gen6_instdone2_bit(GEN6_RCPFE_DONE, "RCPFE");
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gen6_instdone2_bit(GEN6_RCPBE_DONE, "RCPBE");
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gen6_instdone2_bit(GEN6_VDI_DONE, "VDI");
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gen6_instdone2_bit(GEN6_RCZ_DONE, "RCZ");
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gen6_instdone2_bit(GEN6_DAP_DONE, "DAP");
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gen6_instdone2_bit(GEN6_PSD_DONE, "PSD");
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gen6_instdone2_bit(GEN6_IZ_DONE, "IZ");
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gen6_instdone2_bit(GEN6_WMFE_DONE, "WMFE");
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gen6_instdone2_bit(GEN6_SVSM_DONE, "SVSM");
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gen6_instdone2_bit(GEN6_QC_DONE, "QC");
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gen6_instdone2_bit(GEN6_FL_DONE, "FL");
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gen6_instdone2_bit(GEN6_SC_DONE, "SC");
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gen6_instdone2_bit(GEN6_DM_DONE, "DM");
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gen6_instdone2_bit(GEN6_FT_DONE, "FT");
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gen6_instdone2_bit(GEN6_DG_DONE, "DG");
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gen6_instdone2_bit(GEN6_SI_DONE, "SI");
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gen6_instdone2_bit(GEN6_SO_DONE, "SO");
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gen6_instdone2_bit(GEN6_PL_DONE, "PL");
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gen6_instdone2_bit(GEN6_VME_DONE, "VME");
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gen6_instdone2_bit(GEN6_SF_DONE, "SF");
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gen6_instdone2_bit(GEN6_CL_DONE, "CL");
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gen6_instdone2_bit(GEN6_GS_DONE, "GS");
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gen6_instdone2_bit(GEN6_VS0_DONE, "VS0");
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gen6_instdone2_bit(GEN6_VF_DONE, "VF");
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} else if (IS_965(devid)) {
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gen4_instdone_bit(I965_ROW_0_EU_0_DONE, "Row 0, EU 0");
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gen4_instdone_bit(I965_ROW_0_EU_1_DONE, "Row 0, EU 1");
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gen4_instdone_bit(I965_ROW_0_EU_2_DONE, "Row 0, EU 2");
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@ -462,6 +462,39 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# define I965_IC_ROW_1_DONE (1 << 2)
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# define I965_CP_DONE (1 << 1)
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# define I965_RING_0_ENABLE (1 << 0)
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#define GEN6_INSTDONE_1 0x206c
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# define GEN6_MA_3_DONE (1 << 31)
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# define GEN6_EU_32_DONE (1 << 30)
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# define GEN6_EU_31_DONE (1 << 29)
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# define GEN6_EU_30_DONE (1 << 28)
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# define GEN6_MA_2_DONE (1 << 27)
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# define GEN6_EU_22_DONE (1 << 26)
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# define GEN6_EU_21_DONE (1 << 25)
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# define GEN6_EU_20_DONE (1 << 24)
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# define GEN6_MA_1_DONE (1 << 23)
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# define GEN6_EU_12_DONE (1 << 22)
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# define GEN6_EU_11_DONE (1 << 21)
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# define GEN6_EU_10_DONE (1 << 20)
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# define GEN6_MA_0_DONE (1 << 19)
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# define GEN6_EU_02_DONE (1 << 18)
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# define GEN6_EU_01_DONE (1 << 17)
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# define GEN6_EU_00_DONE (1 << 16)
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# define GEN6_IC_3_DONE (1 << 15)
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# define GEN6_IC_2_DONE (1 << 14)
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# define GEN6_IC_1_DONE (1 << 13)
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# define GEN6_IC_0_DONE (1 << 12)
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# define GEN6_ISC_10_DONE (1 << 11)
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# define GEN6_ISC_32_DONE (1 << 10)
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# define GEN6_VSC_DONE (1 << 9)
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# define GEN6_IEF_DONE (1 << 8)
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# define GEN6_VFE_DONE (1 << 7)
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# define GEN6_TD_DONE (1 << 6)
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# define GEN6_TS_DONE (1 << 4)
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# define GEN6_GW_DONE (1 << 3)
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# define GEN6_HIZ_DONE (1 << 2)
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# define GEN6_AVS_DONE (1 << 1)
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#define INST_PS_I965 0x2070
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/* Current active ring head address:
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@ -495,6 +528,40 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# define I965_VS0_CS_DONE (1 << 1)
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# define I965_VF_CS_DONE (1 << 0)
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#define GEN6_INSTDONE_2 0x207c
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# define GEN6_GAM_DONE (1 << 31)
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# define GEN6_CS_DONE (1 << 30)
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# define GEN6_WMBE_DONE (1 << 29)
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# define GEN6_SVRW_DONE (1 << 28)
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# define GEN6_RCC_DONE (1 << 27)
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# define GEN6_SVG_DONE (1 << 26)
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# define GEN6_ISC_DONE (1 << 25)
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# define GEN6_MT_DONE (1 << 24)
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# define GEN6_RCPFE_DONE (1 << 23)
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# define GEN6_RCPBE_DONE (1 << 22)
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# define GEN6_VDI_DONE (1 << 21)
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# define GEN6_RCZ_DONE (1 << 20)
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# define GEN6_DAP_DONE (1 << 19)
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# define GEN6_PSD_DONE (1 << 18)
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# define GEN6_IZ_DONE (1 << 17)
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# define GEN6_WMFE_DONE (1 << 16)
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# define GEN6_SVSM_DONE (1 << 15)
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# define GEN6_QC_DONE (1 << 14)
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# define GEN6_FL_DONE (1 << 13)
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# define GEN6_SC_DONE (1 << 12)
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# define GEN6_DM_DONE (1 << 11)
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# define GEN6_FT_DONE (1 << 10)
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# define GEN6_DG_DONE (1 << 9)
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# define GEN6_SI_DONE (1 << 8)
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# define GEN6_SO_DONE (1 << 7)
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# define GEN6_PL_DONE (1 << 6)
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# define GEN6_VME_DONE (1 << 5)
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# define GEN6_SF_DONE (1 << 4)
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# define GEN6_CL_DONE (1 << 3)
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# define GEN6_GS_DONE (1 << 2)
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# define GEN6_VS0_DONE (1 << 1)
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# define GEN6_VF_DONE (1 << 0)
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#define CACHE_MODE_0 0x2120
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#define CACHE_MODE_1 0x2124
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#define MI_MODE 0x209c
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