mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-11-04 12:07:12 +00:00
Add: tools/intel_audio_dump
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
This commit is contained in:
Wu Fengguang
Zhenyu Wang
parent
b4ddf71a4a
commit
9e9c9f24f5
@ -44,6 +44,12 @@ INREG(uint32_t reg)
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return *(volatile uint32_t *)((volatile char *)mmio + reg);
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}
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static inline void
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OUTREG(uint32_t reg, uint32_t val)
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{
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*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
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}
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void intel_get_pci_device(void);
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void intel_get_mmio(void);
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void intel_get_drm_devid(int fd);
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@ -3489,5 +3489,6 @@ typedef enum {
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#define AUD_CTS_ENABLE 0x62128
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#define VIDEO_DIP_CTL 0x61170
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#define VIDEO_DIP_DATA 0x61178
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#endif /* _I810_REG_H */
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@ -1,4 +1,5 @@
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bin_PROGRAMS = \
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intel_audio_dump \
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intel_gpu_dump \
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intel_gpu_top \
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intel_gpu_time \
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434
tools/intel_audio_dump.c
Normal file
434
tools/intel_audio_dump.c
Normal file
@ -0,0 +1,434 @@
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/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Zhenyu Wang <zhenyu.z.wang@intel.com>
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* Wu Fengguang <fengguang.wu@intel.com>
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdarg.h>
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <pciaccess.h>
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#include <err.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <getopt.h>
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#include <arpa/inet.h>
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#include "intel_gpu_tools.h"
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#define AUD_CONFIG 0x62000
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#define AUD_DEBUG 0x62010
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#define AUD_VID_DID 0x62020
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#define AUD_RID 0x62024
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#define AUD_SUBN_CNT 0x62028
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#define AUD_FUNC_GRP 0x62040
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#define AUD_SUBN_CNT2 0x62044
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#define AUD_GRP_CAP 0x62048
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#define AUD_PWRST 0x6204c
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#define AUD_SUPPWR 0x62050
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#define AUD_SID 0x62054
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#define AUD_OUT_CWCAP 0x62070
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#define AUD_OUT_PCMSIZE 0x62074
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#define AUD_OUT_STR 0x62078
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#define AUD_OUT_DIG_CNVT 0x6207c
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#define AUD_OUT_CH_STR 0x62080
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#define AUD_OUT_STR_DESC 0x62084
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#define AUD_PINW_CAP 0x620a0
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#define AUD_PIN_CAP 0x620a4
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#define AUD_PINW_CONNLNG 0x620a8
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#define AUD_PINW_CONNLST 0x620ac
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#define AUD_PINW_CNTR 0x620b0
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#define AUD_PINW_UNSOLRESP 0x620b8
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#define AUD_CNTL_ST 0x620b4
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#define AUD_PINW_CONFIG 0x620bc
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#define AUD_HDMIW_STATUS 0x620d4
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#define AUD_HDMIW_HDMIEDID 0x6210c
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#define AUD_HDMIW_INFOFR 0x62118
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#define AUD_CONV_CHCNT 0x62120
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#define AUD_CTS_ENABLE 0x62128
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#define VIDEO_DIP_CTL 0x61170
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#define VIDEO_DIP_ENABLE (1<<31)
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#define VIDEO_DIP_ENABLE_AVI (1<<21)
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#define VIDEO_DIP_ENABLE_VENDOR (1<<22)
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#define VIDEO_DIP_ENABLE_SPD (1<<24)
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#define VIDEO_DIP_BUF_AVI (0<<19)
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#define VIDEO_DIP_BUF_VENDOR (1<<19)
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#define VIDEO_DIP_BUF_SPD (3<<19)
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#define VIDEO_DIP_TRANS_ONCE (0<<16)
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#define VIDEO_DIP_TRANS_1 (1<<16)
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#define VIDEO_DIP_TRANS_2 (2<<16)
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#define AUDIO_HOTPLUG_EN (1<<24)
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#define BITSTO(n) (n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1)
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#define BITMASK(high, low) (BITSTO(high+1) & ~BITSTO(low))
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#define BITS(reg, high, low) (((reg) & (BITMASK(high, low))) >> (low))
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#define BIT(reg, n) BITS(reg, n, n)
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#define min_t(type, x, y) ({ \
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type __min1 = (x); \
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type __min2 = (y); \
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__min1 < __min2 ? __min1: __min2; })
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#define OPNAME(names, index) \
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names[min_t(unsigned int, index, ARRAY_SIZE(names) - 1)]
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#define dump_reg(reg, desc) \
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do { \
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dword = INREG(reg); \
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printf("%-18s 0x%08x %s\n", # reg, dword, desc); \
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} while (0)
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static char *pixel_clock[] = {
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[0] = "25.2 / 1.001 MHz",
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[1] = "25.2 MHz",
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[2] = "27 MHz",
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[3] = "27 * 1.001 MHz",
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[4] = "54 MHz",
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[5] = "54 * 1.001 MHz",
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[6] = "74.25 / 1.001 MHz",
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[7] = "74.25 MHz",
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[8] = "148.5 / 1.001 MHz",
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[9] = "148.5 MHz",
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[10] = "Reserved",
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};
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static char *power_state[] = {
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[0] = "D0",
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[1] = "D1",
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[2] = "D2",
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[3] = "D3",
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};
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static char *stream_type[] = {
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[0] = "default samples",
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[1] = "one bit stream",
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[2] = "DST stream",
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[3] = "MLP stream",
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[4] = "Reserved",
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};
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static char *dip_port[] = {
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[0] = "Reserved",
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[1] = "HDMI B",
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[2] = "HDMI C",
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[3] = "Reserved",
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};
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static char *dip_index[] = {
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[0] = "Audio DIP",
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[1] = "ACP DIP",
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[2] = "ISRC1 DIP",
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[3] = "ISRC2 DIP",
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[4] = "Reserved",
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};
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static char *dip_trans[] = {
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[0] = "disabled",
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[1] = "reserved",
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[2] = "send once",
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[3] = "best effort",
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};
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static char *video_dip_index[] = {
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[0] = "AVI DIP",
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[1] = "Vendor-specific DIP",
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[2] = "Reserved",
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[3] = "Source Product Description DIP",
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};
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static char *video_dip_trans[] = {
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[0] = "send once",
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[1] = "send every vsync",
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[2] = "send at least every other vsync",
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[3] = "reserved",
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};
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static void do_self_tests(void)
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{
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if (BIT(1, 0) != 1)
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exit(1);
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if (BIT(0x80000000, 31) != 1)
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exit(2);
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if (BITS(0xc0000000, 31, 30) != 3)
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exit(3);
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}
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int main(int argc, char **argv)
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{
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uint32_t dword;
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int i;
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do_self_tests();
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intel_get_mmio();
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/* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */
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dump_reg(VIDEO_DIP_CTL, "Video DIP Control");
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dump_reg(SDVOB, "Digital Display Port B Control Register");
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dump_reg(SDVOC, "Digital Display Port C Control Register");
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dump_reg(PORT_HOTPLUG_EN, "Hot Plug Detect Enable");
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dump_reg(AUD_CONFIG, "Audio Configuration");
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dump_reg(AUD_DEBUG, "Audio Debug");
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dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
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dump_reg(AUD_RID, "Audio Revision ID");
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dump_reg(AUD_SUBN_CNT, "Audio Subordinate Node Count");
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dump_reg(AUD_FUNC_GRP, "Audio Function Group Type");
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dump_reg(AUD_SUBN_CNT2, "Audio Subordinate Node Count");
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dump_reg(AUD_GRP_CAP, "Audio Function Group Capabilities");
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dump_reg(AUD_PWRST, "Audio Power State");
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dump_reg(AUD_SUPPWR, "Audio Supported Power States");
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dump_reg(AUD_SID, "Audio Root Node Subsystem ID");
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dump_reg(AUD_OUT_CWCAP, "Audio Output Converter Widget Capabilities");
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dump_reg(AUD_OUT_PCMSIZE, "Audio PCM Size and Rates");
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dump_reg(AUD_OUT_STR, "Audio Stream Formats");
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dump_reg(AUD_OUT_DIG_CNVT, "Audio Digital Converter");
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dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID");
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dump_reg(AUD_OUT_STR_DESC, "Audio Stream Descriptor Format");
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dump_reg(AUD_PINW_CAP, "Audio Pin Complex Widget Capabilities");
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dump_reg(AUD_PIN_CAP, "Audio Pin Capabilities");
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dump_reg(AUD_PINW_CONNLNG, "Audio Connection List Length");
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dump_reg(AUD_PINW_CONNLST, "Audio Connection List Entry");
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dump_reg(AUD_PINW_CNTR, "Audio Pin Widget Control");
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dump_reg(AUD_PINW_UNSOLRESP,"Audio Unsolicited Response Enable");
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dump_reg(AUD_CNTL_ST, "Audio Control State Register");
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dump_reg(AUD_PINW_CONFIG, "Audio Configuration Default");
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dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status");
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dump_reg(AUD_HDMIW_HDMIEDID,"Audio HDMI Data EDID Block");
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dump_reg(AUD_HDMIW_INFOFR, "Audio HDMI Widget Data Island Packet");
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dump_reg(AUD_CONV_CHCNT, "Audio Converter Channel Count");
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dump_reg(AUD_CTS_ENABLE, "Audio CTS Programming Enable");
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printf("\nDetails:\n\n");
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dword = INREG(AUD_VID_DID);
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printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
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printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
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dword = INREG(AUD_RID);
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printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
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printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
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printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8));
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printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0));
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dword = INREG(SDVOB);
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printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
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printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
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printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
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printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
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printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
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dword = INREG(SDVOC);
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printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
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printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
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printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
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printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
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printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
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dword = INREG(PORT_HOTPLUG_EN);
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printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)),
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printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)),
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printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)),
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printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", BIT(dword, 26)),
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printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", BIT(dword, 25)),
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printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", BIT(dword, 24)),
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printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)),
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printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)),
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dword = INREG(VIDEO_DIP_CTL);
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printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)),
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printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
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BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
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printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", BIT(dword, 28));
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printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n", BIT(dword, 21));
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printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n", BIT(dword, 22));
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printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n", BIT(dword, 24));
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printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n",
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BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]);
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printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n",
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BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]);
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printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
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printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
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dword = INREG(AUD_CONFIG);
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printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
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OPNAME(pixel_clock, BITS(dword, 19, 16)));
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printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
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printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
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printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
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dword = INREG(AUD_DEBUG);
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printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
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dword = INREG(AUD_SUBN_CNT);
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printf("AUD_SUBN_CNT starting node number\t0x%lx\n", BITS(dword, 23, 16));
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printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
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dword = INREG(AUD_SUBN_CNT2);
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printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", BITS(dword, 24, 16));
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printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
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dword = INREG(AUD_FUNC_GRP);
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printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
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printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
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dword = INREG(AUD_GRP_CAP);
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printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16));
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printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8));
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printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0));
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dword = INREG(AUD_PWRST);
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printf("AUD_PWRST device power state\t\t%s\n",
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power_state[BITS(dword, 5, 4)]);
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printf("AUD_PWRST device power state setting\t%s\n",
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power_state[BITS(dword, 1, 0)]);
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dword = INREG(AUD_SUPPWR);
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printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
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printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
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printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
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printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
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dword = INREG(AUD_OUT_CWCAP);
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printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
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printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
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printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
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BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1);
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printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n", BIT(dword, 11));
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printf("AUD_OUT_CWCAP power control\t\t%lu\n", BIT(dword, 10));
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printf("AUD_OUT_CWCAP digital\t\t\t%lu\n", BIT(dword, 9));
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printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n", BIT(dword, 8));
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printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n", BIT(dword, 7));
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printf("AUD_OUT_CWCAP mute\t\t\t%lu\n", BIT(dword, 5));
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printf("AUD_OUT_CWCAP format override\t\t%lu\n", BIT(dword, 4));
|
||||
printf("AUD_OUT_CWCAP amp param override\t%lu\n", BIT(dword, 3));
|
||||
printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2));
|
||||
printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1));
|
||||
|
||||
dword = INREG(AUD_OUT_DIG_CNVT);
|
||||
printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8));
|
||||
printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7));
|
||||
printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6));
|
||||
printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n", BIT(dword, 5));
|
||||
printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", BIT(dword, 4));
|
||||
printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", BIT(dword, 3));
|
||||
printf("AUD_OUT_DIG_CNVT validity config\t%lu\n", BIT(dword, 2));
|
||||
printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1));
|
||||
printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0));
|
||||
|
||||
dword = INREG(AUD_OUT_CH_STR);
|
||||
printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4));
|
||||
printf("AUD_OUT_CH_STR lowest channel\t\t0x%lx\n", BITS(dword, 3, 0));
|
||||
|
||||
dword = INREG(AUD_OUT_STR_DESC);
|
||||
printf("AUD_OUT_STR_DESC stream channels\t0x%lx\n", BITS(dword, 3, 0));
|
||||
|
||||
dword = INREG(AUD_PINW_CAP);
|
||||
printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
|
||||
printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
|
||||
printf("AUD_PINW_CAP channel count\t\t0x%lx\n",
|
||||
BITS(dword, 15, 13) * 2 + BIT(dword, 0));
|
||||
printf("AUD_PINW_CAP HDCP\t\t\t%lu\n", BIT(dword, 12));
|
||||
printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n", BIT(dword, 11));
|
||||
printf("AUD_PINW_CAP power control\t\t%lu\n", BIT(dword, 10));
|
||||
printf("AUD_PINW_CAP digital\t\t\t%lu\n", BIT(dword, 9));
|
||||
printf("AUD_PINW_CAP conn list\t\t\t%lu\n", BIT(dword, 8));
|
||||
printf("AUD_PINW_CAP unsol\t\t\t%lu\n", BIT(dword, 7));
|
||||
printf("AUD_PINW_CAP mute\t\t\t%lu\n", BIT(dword, 5));
|
||||
printf("AUD_PINW_CAP format override\t\t%lu\n", BIT(dword, 4));
|
||||
printf("AUD_PINW_CAP amp param override\t\t%lu\n", BIT(dword, 3));
|
||||
printf("AUD_PINW_CAP out amp present\t\t%lu\n", BIT(dword, 2));
|
||||
printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1));
|
||||
|
||||
|
||||
dword = INREG(AUD_PIN_CAP);
|
||||
printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16));
|
||||
printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7));
|
||||
printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4));
|
||||
printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
|
||||
|
||||
dword = INREG(AUD_PINW_CNTR);
|
||||
printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8));
|
||||
printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6));
|
||||
printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
|
||||
printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
|
||||
printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n",
|
||||
BITS(dword, 2, 0),
|
||||
OPNAME(stream_type, BITS(dword, 2, 0)));
|
||||
|
||||
dword = INREG(AUD_PINW_UNSOLRESP);
|
||||
printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
|
||||
|
||||
dword = INREG(AUD_CNTL_ST);
|
||||
printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
|
||||
printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22));
|
||||
printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
|
||||
printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n",
|
||||
BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
|
||||
printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n",
|
||||
BITS(dword, 20, 18), OPNAME(dip_index, BITS(dword, 20, 18)));
|
||||
printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n",
|
||||
BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]);
|
||||
printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", BITS(dword, 3, 0));
|
||||
printf("AUD_CNTL_ST CP ready\t\t\t%lu\n", BIT(dword, 15));
|
||||
printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n", BIT(dword, 14));
|
||||
printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n", BIT(dword, 4));
|
||||
printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
|
||||
printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
|
||||
|
||||
dword = INREG(AUD_HDMIW_STATUS);
|
||||
printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
|
||||
printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30));
|
||||
printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29));
|
||||
printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28));
|
||||
|
||||
dword = INREG(AUD_CONV_CHCNT);
|
||||
printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
|
||||
printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1);
|
||||
|
||||
printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
|
||||
for (i = 0; i < 8; i++) {
|
||||
OUTREG(AUD_CONV_CHCNT, i);
|
||||
dword = INREG(AUD_CONV_CHCNT);
|
||||
printf("\t\t\t\t\t[0x%x] %u => %lu \n", dword, i, BITS(dword, 7, 4));
|
||||
}
|
||||
|
||||
printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t");
|
||||
dword = INREG(AUD_CNTL_ST);
|
||||
dword &= ~BITMASK(20, 18);
|
||||
dword &= ~BITMASK(3, 0);
|
||||
OUTREG(AUD_CNTL_ST, dword);
|
||||
for (i = 0; i < 8; i++)
|
||||
printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR)));
|
||||
printf("\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user