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intel-gpu-tools/range handling: register range handling

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Hooks to allow safe accesses from userspace. Can revert to old behavior
by using unsafe access.
This commit is contained in:
Ben Widawsky 2011-07-28 13:42:45 -07:00
parent cac8f8b526
commit abd7038e5a
4 changed files with 69 additions and 2 deletions
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1
lib/Makefile.am
View File

@ -8,6 +8,7 @@ libintel_tools_la_SOURCES = \
intel_mmio.c \
intel_pci.c \
intel_reg.h \
intel_reg_map.c \
instdone.c \
instdone.h \
drmtest.h

8
lib/intel_chipset.h
View File

@ -168,3 +168,11 @@
#define HAS_BLT_RING(devid) (IS_GEN6(devid) || \
IS_GEN7(devid))
#define IS_BROADWATER(devid) (devid == PCI_CHIP_I946_GZ || \
devid == PCI_CHIP_I965_G_1 || \
devid == PCI_CHIP_I965_Q || \
devid == PCI_CHIP_I965_G)
#define IS_CRESTLINE(devid) (devid == PCI_CHIP_I965_GM || \
devid == PCI_CHIP_I965_GME)

23
lib/intel_gpu_tools.h
View File

@ -38,11 +38,32 @@ extern void *mmio;
void intel_get_mmio(struct pci_device *pci_dev);
/* New style register access API */
int intel_register_access_init(struct pci_device *pci_dev);
int intel_register_access_init(struct pci_device *pci_dev, int safe);
void intel_register_access_fini(void);
uint32_t intel_register_read(uint32_t reg);
void intel_register_write(uint32_t reg, uint32_t val);
#define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */
#define INTEL_RANGE_READ (1<<0)
#define INTEL_RANGE_WRITE (1<<1)
#define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE)
#define INTEL_RANGE_END (1<<31)
struct intel_register_range {
uint32_t base;
uint32_t size;
uint32_t flags;
};
struct intel_register_map {
struct intel_register_range *map;
uint32_t top;
uint32_t alignment_mask;
};
struct intel_register_map intel_get_register_map(uint32_t devid);
struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, int mode);
static inline uint32_t
INREG(uint32_t reg)
{

39
lib/intel_mmio.c
View File

@ -51,6 +51,7 @@ static struct _mmio_data {
char debugfs_path[FILENAME_MAX];
char debugfs_forcewake_path[FILENAME_MAX];
uint32_t i915_devid;
struct intel_register_map map;
int key;
} mmio_data;
@ -151,7 +152,7 @@ release_forcewake_lock(int fd)
* @safe: use safe register access tables
*/
int
intel_register_access_init(struct pci_device *pci_dev)
intel_register_access_init(struct pci_device *pci_dev, int safe)
{
int ret;
@ -164,6 +165,8 @@ intel_register_access_init(struct pci_device *pci_dev)
if (mmio_data.inited)
return -1;
mmio_data.safe = safe != 0 ? true : false;
/* Find where the forcewake lock is */
ret = find_debugfs_path("/sys/kernel/debug/dri");
if (ret) {
@ -175,6 +178,8 @@ intel_register_access_init(struct pci_device *pci_dev)
}
mmio_data.i915_devid = pci_dev->device_id;
if (mmio_data.safe)
mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
mmio_data.key = get_forcewake_lock();
mmio_data.inited++;
@ -198,6 +203,25 @@ intel_register_read(uint32_t reg)
if (IS_GEN6(mmio_data.i915_devid))
assert(mmio_data.key != -1);
if (!mmio_data.safe)
goto read_out;
range = intel_get_register_range(mmio_data.map,
reg,
INTEL_RANGE_READ);
if(!range) {
fprintf(stderr, "Register read blocked for safety "
"(*0x%08x)\n", reg);
ret = 0xffffffff;
goto out;
}
read_out:
ret = *(volatile uint32_t *)((volatile char *)mmio + reg);
out:
return ret;
}
void
@ -210,5 +234,18 @@ intel_register_write(uint32_t reg, uint32_t val)
if (IS_GEN6(mmio_data.i915_devid))
assert(mmio_data.key != -1);
if (!mmio_data.safe)
goto write_out;
range = intel_get_register_range(mmio_data.map,
reg,
INTEL_RANGE_WRITE);
if (!range) {
fprintf(stderr, "Register write blocked for safety "
"(*0x%08x = 0x%x)\n", reg, val);
}
write_out:
*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
}