Four new tests for error handling

Add four new tests for error the error handling cases:
  - gem_bad_address - store to a bad address, should generate a protection or
    page table error
  - gem_bad_batch - try to execute a bad batch, should generate a protection,
    invalid instruction or page table error
  - gem_bad_blit - blit to an invalid location, should generated a protection
    or page table error
  - gem_hang - hang the GPU on an event that will never happen, test hang
    detection & recovery code
This commit is contained in:
Jesse Barnes 2009-06-18 18:07:47 -07:00
parent 49c564ec2f
commit bbafc3d0bf
7 changed files with 396 additions and 1 deletions

4
.gitignore vendored
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@ -46,6 +46,10 @@ tests/gem_readwrite
tests/gem_ringfill
tests/gem_tiled_blits
tests/gem_tiled_pread
tests/gem_bad_address
tests/gem_bad_batch
tests/gem_bad_blit
tests/gem_hang
tools/intel_gpu_dump
tools/intel_gpu_top
tools/intel_stepping

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@ -2434,6 +2434,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
#define DISABLE_PERSPECTIVE_DIVIDE (1<<29)
#define MI_STORE_DWORD_IMM ((0x20<<23)|2)
#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
#define MI_SET_CONTEXT (0x18<<23)
#define CTXT_NO_RESTORE (1)
#define CTXT_PALETTE_SAVE_DISABLE (1<<3)
@ -2460,6 +2463,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
#define MI_WAIT_FOR_PIPEB_VBLANK (1<<7)
#define MI_WAIT_FOR_PIPEA_VBLANK (1<<3)
#define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5)
#define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1)
#define MI_LOAD_SCAN_LINES_INCL (0x12<<23)
/* Flush */
#define MI_FLUSH (0x04<<23)

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@ -9,7 +9,11 @@ TESTS = getversion \
gem_pread_after_blit \
gem_tiled_pread \
gem_tiled_blits \
gem_largeobject
gem_largeobject \
gem_bad_address \
gem_bad_blit \
gem_bad_batch \
gem_hang
EXTRA_PROGRAMS = $(TESTS)
CLEANFILES = $(EXTRA_PROGRAMS)

82
tests/gem_bad_address.c Normal file
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@ -0,0 +1,82 @@
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
* Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "drm.h"
#include "i915_drm.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
#include "intel_gpu_tools.h"
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
#define BAD_GTT_DEST ((512*1024*1024)) /* past end of aperture */
static void
bad_store(void)
{
BEGIN_BATCH(4);
OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | 1 << 21);
OUT_BATCH(0);
OUT_BATCH(BAD_GTT_DEST);
OUT_BATCH(0xdeadbeef);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
int main(int argc, char **argv)
{
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
bad_store();
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}

78
tests/gem_bad_batch.c Normal file
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@ -0,0 +1,78 @@
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
* Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "drm.h"
#include "i915_drm.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
#include "intel_gpu_tools.h"
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static void
bad_batch(void)
{
BEGIN_BATCH(2);
OUT_BATCH(MI_BATCH_BUFFER_START);
OUT_BATCH(0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
int main(int argc, char **argv)
{
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
bad_batch();
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}

122
tests/gem_bad_blit.c Normal file
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@ -0,0 +1,122 @@
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
/** @file gem_tiled_blits.c
*
* This is a test of doing many tiled blits, with a working set
* larger than the aperture size.
*
* The goal is to catch a couple types of failure;
* - Fence management problems on pre-965.
* - A17 or L-shaped memory tiling workaround problems in acceleration.
*
* The model is to fill a collection of 1MB objects in a way that can't trip
* over A6 swizzling -- upload data to a non-tiled object, blit to the tiled
* object. Then, copy the 1MB objects randomly between each other for a while.
* Finally, download their data through linear objects again and see what
* resulted.
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "drm.h"
#include "i915_drm.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
#include "intel_gpu_tools.h"
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
#define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */
static void
bad_blit(drm_intel_bo *src_bo)
{
uint32_t src_pitch = 512, dst_pitch = 512;
uint32_t cmd_bits = 0;
if (IS_965(devid)) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
if (IS_965(devid)) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
OUT_BATCH(BAD_GTT_DEST);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
int main(int argc, char **argv)
{
drm_intel_bo *src;
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
bad_blit(src);
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}

98
tests/gem_hang.c Normal file
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@ -0,0 +1,98 @@
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
* Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "drm.h"
#include "i915_drm.h"
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
#include "intel_gpu_tools.h"
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static int bad_pipe;
static void
gpu_hang(void)
{
int cmd;
cmd = bad_pipe ? MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW :
MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
BEGIN_BATCH(6);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
OUT_BATCH((0 << 16) | 2048);
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
OUT_BATCH((0 << 16) | 2048);
OUT_BATCH(MI_WAIT_FOR_EVENT | cmd);
OUT_BATCH(MI_NOOP);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
int main(int argc, char **argv)
{
int fd;
if (argc != 2) {
fprintf(stderr, "usage: %s <disabled pipe number>\n",
argv[0]);
exit(-1);
}
bad_pipe = atoi(argv[1]);
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
gpu_hang();
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}