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Enable compilation on non-Intel, non-DRM systems.

Browse Source 
A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2010-04-08 11:56:57 +01:00
parent cd64e19329
commit 95374225e8
29 changed files with 309 additions and 246 deletions
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17
benchmarks/Makefile.am
View File

@ -1,8 +1,15 @@
bin_PROGRAMS = \
intel_upload_blit_large \
intel_upload_blit_large_gtt \
intel_upload_blit_large_map \
intel_upload_blit_small
NULL=#
bin_PROGRAMS = $(NULL)
if HAVE_DRM
bin_PROGRAMS += \
intel_upload_blit_large \
intel_upload_blit_large_gtt \
intel_upload_blit_large_map \
intel_upload_blit_small \
$(NULL)
endif
BENCHMARK_LIBS = \
../lib/libintel_tools.la \

7
configure.ac
View File

@ -40,7 +40,12 @@ AC_PROG_LIBTOOL
AC_PROG_CC
AM_PROG_CC_C_O
PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.6])
PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.6], have_drm=yes, have_drm=no)
if test "x$have_drm" = "xyes"; then
AC_DEFINE([HAVE_DRM], 1, [Define to 1 if we have DRM support])
fi
AM_CONDITIONAL(HAVE_DRM, test "x$have_drm" = "xyes")
PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
dnl Use lots of warning flags with GCC

19
lib/Makefile.am
View File

@ -1,16 +1,25 @@
NULL=#
AM_CFLAGS = $(WARN_CFLAGS) -I$(srcdir)/..
libintel_tools_la_SOURCES = \
intel_batchbuffer.c \
intel_batchbuffer.h \
intel_chipset.h \
intel_gpu_tools.c \
intel_gpu_tools.h \
intel_mmio.c \
intel_pci.c \
intel_reg.h \
instdone.c \
instdone.h \
drmtest.c \
drmtest.h
if HAVE_DRM
libintel_tools_la_SOURCES += \
intel_batchbuffer.c \
intel_drm.c \
drmtest.c \
$(NULL)
AM_CFLAGS += $(DRM_CFLAGS)
endif
noinst_LTLIBRARIES = libintel_tools.la
AM_CFLAGS = $(DRM_CFLAGS) $(WARN_CFLAGS) \
-I$(srcdir)/..

6
lib/instdone.c
View File

@ -25,9 +25,11 @@
*
*/
#include "intel_gpu_tools.h"
#include "instdone.h"
#include "intel_chipset.h"
#include "intel_reg.h"
struct instdone_bit instdone_bits[MAX_INSTDONE_BITS];
int num_instdone_bits = 0;
@ -133,7 +135,7 @@ init_g4x_instdone1(void)
}
void
init_instdone_definitions(void)
init_instdone_definitions(uint32_t devid)
{
if (IS_GEN6(devid)) {
/* Now called INSTDONE_1 in the docs. */

4
lib/instdone.h
View File

@ -25,6 +25,8 @@
*
*/
#include <stdint.h>
#define MAX_INSTDONE_BITS 100
struct instdone_bit {
@ -36,4 +38,4 @@ struct instdone_bit {
extern struct instdone_bit instdone_bits[MAX_INSTDONE_BITS];
extern int num_instdone_bits;
void init_instdone_definitions(void);
void init_instdone_definitions(uint32_t devid);

47
lib/intel_batchbuffer.c
View File

@ -30,9 +30,13 @@
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include "drm.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
#include "intel_chipset.h"
#include "intel_reg.h"
#include <i915_drm.h>
void
intel_batchbuffer_reset(struct intel_batchbuffer *batch)
@ -137,3 +141,46 @@ intel_batchbuffer_data(struct intel_batchbuffer *batch,
memcpy(batch->ptr, data, bytes);
batch->ptr += bytes;
}
void
intel_copy_bo(struct intel_batchbuffer *batch,
drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
int width, int height, uint32_t devid)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}

4
lib/intel_batchbuffer.h
View File

@ -115,4 +115,8 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
intel_batchbuffer_emit_dword(batch, MI_FLUSH);
}
void intel_copy_bo(struct intel_batchbuffer *batch,
drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
int width, int height, uint32_t devid);
#endif

57
lib/intel_drm.c Normal file
View File

@ -0,0 +1,57 @@
/*
* Copyright © 2008 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <err.h>
#include <assert.h>
#include <sys/ioctl.h>
#include <sys/fcntl.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include "intel_gpu_tools.h"
#include "i915_drm.h"
uint32_t
intel_get_drm_devid(int fd)
{
int ret;
struct drm_i915_getparam gp;
uint32_t devid;
gp.param = I915_PARAM_CHIPSET_ID;
gp.value = (int *)&devid;
ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
assert(ret == 0);
return devid;
}

21
lib/intel_gpu_tools.h
View File

@ -25,19 +25,18 @@
*
*/
#include <stdint.h>
#include <sys/types.h>
#include <pciaccess.h>
#include "i915_drm.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
#include "intel_reg.h"
extern struct pci_device *pci_dev;
extern uint32_t devid;
extern void *mmio;
#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))
extern void *mmio;
void intel_get_mmio(struct pci_device *pci_dev);
static inline uint32_t
INREG(uint32_t reg)
{
@ -50,10 +49,8 @@ OUTREG(uint32_t reg, uint32_t val)
*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
}
void intel_get_pci_device(void);
void intel_get_mmio(void);
void intel_get_drm_devid(int fd);
void intel_copy_bo(struct intel_batchbuffer *batch,
drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
int width, int height);
struct pci_device *intel_get_pci_device(void);
uint32_t intel_get_drm_devid(int fd);
void intel_map_file(char *);

98
lib/intel_gpu_tools.c → lib/intel_mmio.c
View File

@ -36,57 +36,11 @@
#include <sys/fcntl.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include "intel_gpu_tools.h"
#include "i915_drm.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
struct pci_device *pci_dev;
uint32_t devid;
void *mmio;
void
intel_get_drm_devid(int fd)
{
int ret;
struct drm_i915_getparam gp;
gp.param = I915_PARAM_CHIPSET_ID;
gp.value = (int *)&devid;
ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
assert(ret == 0);
}
void
intel_get_pci_device(void)
{
int err;
err = pci_system_init();
if (err != 0) {
fprintf(stderr, "Couldn't initialize PCI system: %s\n",
strerror(err));
exit(1);
}
/* Grab the graphics card */
pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
if (pci_dev == NULL)
errx(1, "Couldn't find graphics card");
err = pci_device_probe(pci_dev);
if (err != 0) {
fprintf(stderr, "Couldn't probe graphics card: %s\n",
strerror(err));
exit(1);
}
if (pci_dev->vendor_id != 0x8086)
errx(1, "Graphics card is non-intel");
devid = pci_dev->device_id;
}
void
intel_map_file(char *file)
{
@ -110,13 +64,13 @@ intel_map_file(char *file)
}
void
intel_get_mmio(void)
intel_get_mmio(struct pci_device *pci_dev)
{
uint32_t devid;
int mmio_bar;
int err;
intel_get_pci_device();
devid = pci_dev->device_id;
if (IS_9XX(devid))
mmio_bar = 0;
else
@ -135,47 +89,3 @@ intel_get_mmio(void)
}
}
void
intel_copy_bo(struct intel_batchbuffer *batch,
drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
int width, int height)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}

71
lib/intel_pci.c Normal file
View File

@ -0,0 +1,71 @@
/*
* Copyright © 2008 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <err.h>
#include <assert.h>
#include <sys/ioctl.h>
#include <sys/fcntl.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include "intel_gpu_tools.h"
struct pci_device *
intel_get_pci_device(void)
{
struct pci_device *pci_dev;
int err;
err = pci_system_init();
if (err != 0) {
fprintf(stderr, "Couldn't initialize PCI system: %s\n",
strerror(err));
exit(1);
}
/* Grab the graphics card */
pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
if (pci_dev == NULL)
errx(1, "Couldn't find graphics card");
err = pci_device_probe(pci_dev);
if (err != 0) {
fprintf(stderr, "Couldn't probe graphics card: %s\n",
strerror(err));
exit(1);
}
if (pci_dev->vendor_id != 0x8086)
errx(1, "Graphics card is non-intel");
return pci_dev;
}

1
tests/gem_bad_address.c
View File

@ -65,7 +65,6 @@ int main(int argc, char **argv)
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);

1
tests/gem_bad_batch.c
View File

@ -61,7 +61,6 @@ int main(int argc, char **argv)
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);

7
tests/gem_bad_blit.c
View File

@ -63,7 +63,7 @@ struct intel_batchbuffer *batch;
#define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */
static void
bad_blit(drm_intel_bo *src_bo)
bad_blit(drm_intel_bo *src_bo, uint32_t devid)
{
uint32_t src_pitch = 512, dst_pitch = 512;
uint32_t cmd_bits = 0;
@ -100,10 +100,11 @@ bad_blit(drm_intel_bo *src_bo)
int main(int argc, char **argv)
{
drm_intel_bo *src;
uint32_t devid;
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@ -111,7 +112,7 @@ int main(int argc, char **argv)
src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
bad_blit(src);
bad_blit(src, devid);
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);

13
tests/gem_pread_after_blit.c
View File

@ -131,9 +131,10 @@ main(int argc, char **argv)
drm_intel_bo *src1, *src2, *bo;
uint32_t start1 = 0;
uint32_t start2 = 1024 * 1024 / 4;
uint32_t devid;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@ -146,21 +147,21 @@ main(int argc, char **argv)
/* First, do a full-buffer read after blitting */
printf("Large read after blit 1\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
printf("Large read after blit 2\n");
intel_copy_bo(batch, bo, src2, width, height);
intel_copy_bo(batch, bo, src2, width, height, devid);
verify_large_read(bo, start2);
printf("Small reads after blit 1\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_small_read(bo, start1);
printf("Small reads after blit 2\n");
intel_copy_bo(batch, bo, src2, width, height);
intel_copy_bo(batch, bo, src2, width, height, devid);
verify_small_read(bo, start2);
printf("Large read after blit 3\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
drm_intel_bo_unreference(src1);

5
tests/gem_ringfill.c
View File

@ -55,11 +55,12 @@ static const int size = 1024 * 1024;
int main(int argc, char **argv)
{
int fd;
uint32_t devid;
int i;
drm_intel_bo *src_bo, *dst_bo;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@ -84,7 +85,7 @@ int main(int argc, char **argv)
* doing this, we aren't likely to with this test.
*/
for (i = 0; i < 128 * 1024 / (8 * 4) * 1.25; i++) {
intel_copy_bo(batch, dst_bo, src_bo, width, height);
intel_copy_bo(batch, dst_bo, src_bo, width, height, devid);
intel_batchbuffer_flush(batch);
}

50
tests/gem_tiled_blits.c
View File

@ -60,47 +60,7 @@
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static int width = 512, height = 512;
static void
copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
static uint32_t devid;
static drm_intel_bo *
create_bo(uint32_t start_val)
@ -126,7 +86,7 @@ create_bo(uint32_t start_val)
}
drm_intel_bo_unmap(linear_bo);
copy_bo(bo, linear_bo);
intel_copy_bo (batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
@ -142,7 +102,7 @@ check_bo(drm_intel_bo *bo, uint32_t start_val)
linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
copy_bo(linear_bo, bo);
intel_copy_bo(batch, linear_bo, bo, width, height, devid);
drm_intel_bo_map(linear_bo, 0);
linear = linear_bo->virtual;
@ -171,7 +131,7 @@ int main(int argc, char **argv)
int i;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@ -196,7 +156,7 @@ int main(int argc, char **argv)
if (src == dst)
continue;
copy_bo(bo[dst], bo[src]);
intel_copy_bo(batch, bo[dst], bo[src], width, height, devid);
bo_start_val[dst] = bo_start_val[src];
/*

50
tests/gem_tiled_pread.c
View File

@ -58,49 +58,8 @@ static const int size = 1024 * 1024;
#define PAGE_SIZE 4096
static void
copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
static drm_intel_bo *
create_bo(void)
create_bo(uint32_t devid)
{
drm_intel_bo *bo, *linear_bo;
uint32_t *linear;
@ -122,7 +81,7 @@ create_bo(void)
linear[i] = val++;
drm_intel_bo_unmap(linear_bo);
copy_bo(bo, linear_bo);
intel_copy_bo(batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
@ -163,19 +122,20 @@ int
main(int argc, char **argv)
{
int fd;
uint32_t devid;
drm_intel_bo *bo;
int i, iter = 100;
uint32_t buf[width * height];
uint32_t tiling, swizzle;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
bo = create_bo();
bo = create_bo(devid);
drm_intel_bo_get_tiling(bo, &tiling, &swizzle);

4
tools/intel_audio_dump.c
View File

@ -38,6 +38,7 @@
#include <fcntl.h>
#include <getopt.h>
#include <arpa/inet.h>
#include "intel_gpu_tools.h"
#define AUD_CONFIG 0x62000
@ -187,7 +188,8 @@ int main(int argc, char **argv)
int i;
do_self_tests();
intel_get_mmio();
intel_get_mmio(intel_get_pci_device());
/* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */

14
tools/intel_error_decode.c
View File

@ -55,9 +55,15 @@
#include "instdone.h"
static void
print_instdone (unsigned int instdone, unsigned int instdone1)
print_instdone (uint32_t devid, unsigned int instdone, unsigned int instdone1)
{
int i;
static int once;
if (!once) {
init_instdone_definitions(devid);
once = 1;
}
for (i = 0; i < num_instdone_bits; i++) {
int busy = 0;
@ -190,11 +196,11 @@ read_data_file (const char * filename)
matched = sscanf (line, " INSTDONE: 0x%08x\n", &reg);
if (matched)
print_instdone (reg, -1);
print_instdone (devid, reg, -1);
matched = sscanf (line, " INSTDONE1: 0x%08x\n", &reg);
if (matched)
print_instdone (-1, reg);
print_instdone (devid, -1, reg);
continue;
}
@ -247,8 +253,6 @@ main (int argc, char *argv[])
return 1;
}
init_instdone_definitions();
if (argc == 1) {
path = "/debug/dri/0";
err = stat (path, &st);

16
tools/intel_gpu_dump.c
View File

@ -92,7 +92,7 @@ print_instdone (unsigned int instdone, unsigned int instdone1)
* exit()).
*/
static void
read_data_file (const char * filename, int is_batch)
read_data_file (uint32_t devid, const char * filename, int is_batch)
{
FILE *file;
uint32_t *data = NULL;
@ -250,7 +250,9 @@ main (int argc, char *argv[])
const char *path;
struct stat st;
int err;
uint32_t devid;
uint32_t instdone, instdone1 = 0;
struct pci_device *pci_dev;
if (argc > 2) {
fprintf (stderr,
@ -271,8 +273,10 @@ main (int argc, char *argv[])
return 1;
}
intel_get_mmio();
init_instdone_definitions();
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id;
intel_get_mmio(pci_dev);
init_instdone_definitions(devid);
if (argc == 1) {
path = "/debug/dri/0";
@ -352,7 +356,7 @@ main (int argc, char *argv[])
asprintf (&filename, "%s/i915_batchbuffers", path);
intel_decode_context_set_head_tail(acthd, 0xffffffff);
read_data_file (filename, 1);
read_data_file (devid, filename, 1);
free (filename);
asprintf (&filename, "%s/i915_ringbuffer_data", path);
@ -360,10 +364,10 @@ main (int argc, char *argv[])
printf("Ringbuffer: ");
printf("Reminder: head pointer is GPU read, tail pointer is CPU "
"write\n");
read_data_file (filename, 0);
read_data_file (devid, filename, 0);
free (filename);
} else {
read_data_file (path, 1);
read_data_file (devid, path, 1);
}
return 0;

2
tools/intel_gpu_time.c
View File

@ -65,7 +65,7 @@ int main(int argc, char **argv)
static struct rusage rusage;
int status;
intel_get_mmio();
intel_get_mmio(intel_get_pci_device());
if (argc == 1) {
fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);

14
tools/intel_gpu_top.c
View File

@ -137,8 +137,9 @@ print_clock(char *name, int clock) {
}
static int
print_clock_info(void)
print_clock_info(struct pci_device *pci_dev)
{
uint32_t devid = pci_dev->device_id;
uint16_t gcfgc;
if (IS_GM45(devid)) {
@ -284,11 +285,16 @@ print_percentage_bar(float percent, int cur_line_len)
int main(int argc, char **argv)
{
intel_get_mmio();
struct pci_device *pci_dev;
uint32_t ring_size;
uint32_t devid;
int i;
init_instdone_definitions();
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id;
intel_get_mmio(pci_dev);
init_instdone_definitions(devid);
for (i = 0; i < num_instdone_bits; i++) {
top_bits[i].bit = &instdone_bits[i];
top_bits[i].count = 0;
@ -362,7 +368,7 @@ int main(int argc, char **argv)
printf("%s", clear_screen);
print_clock_info();
print_clock_info(pci_dev);
percent = ring_idle / SAMPLES_TO_PERCENT_RATIO;
len = printf("%30s: %3d%%: ", "ring idle", percent);

6
tools/intel_gtt.c
View File

@ -42,10 +42,14 @@
int main(int argc, char **argv)
{
struct pci_device *pci_dev;
int start, aper_size;
unsigned char *gtt;
uint32_t devid;
intel_get_mmio();
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id;
intel_get_mmio(pci_dev);
if (!IS_9XX(devid)) {
printf("Unsupported chipset for gtt dumper\n");

2
tools/intel_lid.c
View File

@ -117,7 +117,7 @@ int main(int argc, char **argv)
{
int swf14, acpi_lid;
intel_get_mmio();
intel_get_mmio(intel_get_pci_device());
while (1) {
swf14 = INREG(SWF14);

9
tools/intel_reg_dumper.c
View File

@ -33,6 +33,8 @@
#include <err.h>
#include "intel_gpu_tools.h"
static uint32_t devid;
#define DEBUGSTRING(func) static void func(char **result, int reg, uint32_t val)
DEBUGSTRING(i830_16bit_func)
@ -1658,10 +1660,15 @@ intel_dump_regs(void)
int main(int argc, char** argv)
{
struct pci_device *pci_dev;
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id; /* XXX not true when mapping! */
if (argc == 2)
intel_map_file(argv[1]);
else
intel_get_mmio();
intel_get_mmio(pci_dev);
if (HAS_PCH_SPLIT(devid) || getenv("HAS_PCH_SPLIT"))
ironlake_dump_regs();

2
tools/intel_reg_read.c
View File

@ -53,7 +53,7 @@ int main(int argc, char** argv)
exit(1);
}
intel_get_mmio();
intel_get_mmio(intel_get_pci_device());
if (!strcmp(argv[1], "-f")) {
dump_range(0x00000, 0x00fff); /* VGA registers */

6
tools/intel_reg_snapshot.c
View File

@ -29,9 +29,13 @@
int main(int argc, char** argv)
{
struct pci_device *pci_dev;
uint32_t devid;
int mmio_bar;
intel_get_mmio();
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id;
intel_get_mmio(pci_dev);
if (IS_9XX(devid))
mmio_bar = 0;

2
tools/intel_reg_write.c
View File

@ -43,7 +43,7 @@ int main(int argc, char** argv)
exit(1);
}
intel_get_mmio();
intel_get_mmio(intel_get_pci_device());
sscanf(argv[1], "0x%x", &reg);
sscanf(argv[2], "0x%x", &value);
ptr = (volatile uint32_t *)((volatile char *)mmio + reg);