flywithu/ntel-gpu-tools
1
0
Fork 0
mirror of https://github.com/tiagovignatti/intel-gpu-tools.git synced 2025-11-04 12:07:12 +00:00
Code Issues Releases Wiki Activity
4,121 Commits 13 Branches 0 Tags
Commit Graph

344 Commits

Author SHA1 Message Date
Homer Hsing
88dfdf34df Supporting multi-branch instructios BRD & BRC 
brd: redirect channels to branches
brc: let channels converging together

also rewrite code converting label to offset
 2013-03-04 15:54:33 +00:00
Homer Hsing
5d589dbe13 Use right-recursing in parser rule inst_option_list 
This recursing cost less memory. It is recommended by Bison.
 2013-03-04 15:54:33 +00:00
Homer Hsing
a7b1c09d18 Support subroutine instructions, CALL & RET 2013-03-04 15:54:33 +00:00
Homer Hsing
c0ebde2786 Merge replicative code in gram.y 2013-03-04 15:54:33 +00:00
Homer Hsing
b0b540f02a Reduce replicative code in gram.y by reloc_target field in src_operand 
Bspec says JIP and UIP should be the source operands. It is better if
src_operand has a field "reloc_target" according to bspec.
The replicative code in JMPI and branchloop rules can be merged into one.
 2013-03-04 15:54:33 +00:00
Homer Hsing
1f9a4d71e8 Restrict type of relativelocation2 to int 
Original rule set it to EXP | NUMBER, then YYERROR if it is NUMBER.
This patch set it directly to EXP, restricting its type to int.
 2013-03-04 15:54:33 +00:00
Homer Hsing
ccd1721190 Rewrite label matching code. Collect labels in a linked list. 
Label matching is faster because of searching only in a small list,
rather than searching a label in all instructions.
 2013-03-04 15:54:33 +00:00
Homer Hsing
751838e809 Add second_reloc_target in the data structure. 
Since Gen6+, some branching instructions have two relocation targets.
 2013-03-04 15:54:33 +00:00
Homer Hsing
d6f02c181f Add test case for ".declare" overriding feature. 
Later same name .declare pragma will override previously defined
one. This patch add a test case for that feature.
 2013-03-04 15:54:33 +00:00
Homer Hsing
2ab4c0d9b8 Fix memory leaking in the parser 
STRING has been malloc'ed by strdup in src/lex.l but forgotten to
be freed in src/gram.y.
 2013-03-04 15:54:33 +00:00
Homer Hsing
741008e050 Fix field length of JIP for one-offset-branch in Gen6 
Such JIP has 25 bits length in Gen6.
 2013-03-04 15:54:33 +00:00
Homer Hsing
6983eebf47 Automatically run all test cases. 
In the past test/run-test.sh run only one test case per call.
This patch let it automatically run all test cases.
 2013-03-04 15:54:32 +00:00
Homer Hsing
1c009349bc Fix missing environment variables problem in test/run-test.sh 
Currently test/run-test.sh cannot get the value of ${srcdir} and
${top_builddir}. Thus we cannot run any test case. This patch uses
$0 to get the absolute path of run-test.sh. Now test cases work.
 2013-03-04 15:54:32 +00:00
Homer Hsing
868cbf7dc5 Add a generic hash table algorithm. Reuse for declared_reg_table and label_table in the future. 
Rewrite find_register() and insert_register(). The hash table code
has been extracted. We may use those code for label table in the future.
 2013-03-04 15:54:32 +00:00
Homer Hsing
131f61f2ef Add a test case for ".declare" pragma 2013-03-04 15:54:32 +00:00
Homer Hsing
c3bcc7dbeb Rename brw_instruction.bits3.if_else to branch 
Because that field will be used for all branch instructions
 2013-03-04 15:54:32 +00:00
Homer Hsing
bebe8179e1 According to BSPEC, put PLN & BFI1 to binaryop, put SUBB to binaryaccop 
bspec: BFI1 should not access accumulator. PLN should not use accumulator
as source.
future work in gram.y: show warning if acc is used as dest for
ADDC/SUBB/CMP/CMPN/SHL/BFI1.
 2013-03-04 15:54:32 +00:00
Homer Hsing
74383f4db4 Explain the difference between binaryinstruction and binaryaccinstruction 
Developers may add new instructions in wrong place in the future
if they don't know the difference between binaryinstruction and
binaryaccinstruction.
 2013-03-04 15:54:32 +00:00
Homer Hsing
375d1fd7b2 Renaming according to BSPEC: jump_count -> JIP; pop_count -> UIP. 
Since bspec SNB+, jump_count and pop_count is renamed to JIP and uIP.
 2013-03-04 15:54:32 +00:00
Homer Hsing
6171c61e0c Use bits3.if_else.jump_count instead of bits3.ud for readability 2013-03-04 15:54:32 +00:00
Homer Hsing
5defbd37b6 Pad NOP instructions instead of the ILLEGAL instruction for entry 
If a label is an entry, the assembler will pad empty instruction
before the label until offset % 4 == 0. In the past, the ILLEGAL
instructions are padded. It may raise exceptions. We use the NOP
instructions instead.
 2013-03-04 15:54:32 +00:00
Homer Hsing
e6d61ac202 Merge same if branches in declare_pragma section in gram.y 2013-03-04 15:54:32 +00:00
Homer Hsing
c19f8338d7 Reduce memory cost in entry_table 
Original code double entry table space if there is no space. It may
waste 50% memory of the entry table. Now we use a link list to store
entry items.
 2013-03-04 15:54:32 +00:00
Homer Hsing
f02a1ed427 Make the entry point padding code logic looks nicer 2013-03-04 15:54:32 +00:00
Homer Hsing
73ab2f6a68 Fix a typo in src/main.c: "in unit of type" -> "in unit of byte" 2013-03-04 15:54:32 +00:00
Homer Hsing
7186723f81 Reduce hash value collision probability in src/main.c 
Original code use "hash_value = *name++", which may produce
hash value collision for word permutations like "abc", "bac" and "cba".
 2013-03-04 15:54:32 +00:00
Homer Hsing
940522588a Move program_defaults init statement into variable declaration 
In original code, the init value for "program_defaults.register_type"
is put inside main(), which may be hard to maintain.
 2013-03-04 15:54:31 +00:00
Homer Hsing
77dcc41cfd Better comment text. Change "c like" to "C style" in main.c 2013-03-04 15:54:31 +00:00
Homer Hsing
81859af110 Replace bzero by memset. 
bzero has been removed from POSIX.1-2008. Should use memset instead.
 2013-03-04 15:54:31 +00:00
Homer Hsing
b1ef3bc209 Supporting integer subtraction with borrow 
subb: subtract unsigned integer src1 from src0. store the result
in dst and store the borrow (0 or 1) as a 32-bit value in acc.
 2013-03-04 15:54:31 +00:00
Homer Hsing
9e711a4f2c Supporting find first bit instructions 
fbh: Find the first significant bit searching from the high bits
in src0 and store the result in dst.

fbl: Find the first 1 bit searching from the low bits in src0
and store the result in dst.
 2013-03-04 15:54:31 +00:00
Homer Hsing
b094cd8648 Supporting half precision to single precision float convertion 
The f16to32 instruction converts the half precision float
in src0 to single precision float and storing in dst.

The f32to16 instruction converts the single precision float
in src0 to half precision float and storing in the lower word
of each channel in dst.
 2013-03-04 15:54:31 +00:00
Homer Hsing
4285d9c2ce Supporting count bit set instruction 
The cbit instruction counts component-wise the total bits set
in src0 and stores the resulting counts in dst.
 2013-03-04 15:54:31 +00:00
Homer Hsing
d4f48a7271 Supporting instruction "reverse bits" 
The bfrev instruction component-wise reverses all the bits in src0
and stores the results in dst.
 2013-03-04 15:54:31 +00:00
Homer Hsing
4d6337dfaf Supporting instruction Bit Field Insert 1 
The bfi1 instruction component-wise generates mask with control
from src0 and src1 and stores the results in dst.
 2013-03-04 15:54:31 +00:00
Homer Hsing
5777bfa91f Delete an extra space character in brw_defines.h 
Now the column is aligned and the code is nicer.
 2013-03-04 15:54:31 +00:00
Homer Hsing
c3f1e0a732 Supporting addc instruction 
The addc instruction performs component-wise addition of
src0 and src1 and stores the results in dst;
it also stores the carry into acc.
 2013-03-04 15:54:31 +00:00
Homer Hsing
8ca55688ea Supporting bit field extract and bit field insert 2 
Supporting two new operators, bfe and bfi2
bfe: Component-wise extracts a bit field from src2 using the bit field width from src0 and the bit field offset from src1.
bfi2: component-wise performs the bitfield insert operation on src1 and src2 based on the mask in src0.
 2013-03-04 15:54:31 +00:00
Homer Hsing
210510cebb Supporting LRP: dest = src0 * src1 + (1-src0) * src2 2013-03-04 15:54:31 +00:00
Homer Hsing
a034bcbd04 Support trinary source instruction "multiply add". 
MAD (Multiply ADd) computes dst <- src1*src2 + src0.

Tried best to follow previous variable naming habit.

Also renamed "triinstruction" -> "trinaryinstruction" in grammar parser
for better readability.
 2013-03-04 15:54:31 +00:00
Homer Hsing
0d3f8495ea add data structure in src/brw_structs.h for supporting three-source-operator instruncions 2013-03-04 15:54:30 +00:00
Homer Hsing
75f1d80982 Comment magic words "da1", "da16", "ia1", and "ia16" 2013-03-04 15:54:30 +00:00
Homer Hsing
aab7cd5cc5 close File yyin before calling yylex_destroy 
This patch makes sure file handler yyin is closed.
yylex_destroy() calls yy_init_globals(), which reset yyin to 0.
Therefore if we do not close yyin before yylex_destroy(), yyin
will not be closed anymore.
 2013-03-04 15:54:30 +00:00
Homer Hsing
31401afe78 Call yylex_destroy() to free memory after yyparse() 2013-03-04 15:54:30 +00:00
Homer Hsing
302ca73198 Close input file handler yyin after yyparse 2013-03-04 15:54:30 +00:00
Homer Hsing
f282ea689b Fix a typo ... lable -> label 2013-03-04 15:54:30 +00:00
Lu Guanqun
ea1fcf0b44 fix the label checking logics 
Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
 2013-03-04 15:54:30 +00:00
Xiang, Haihao
4d75db550e Waring if both predication and conditional modifier are enabled but use different flag registers 
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
 2013-03-04 15:54:30 +00:00
Xiang, Haihao
3ffbe96c1e Add support for flag register f1 on Ivy bridge 
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
 2013-03-04 15:54:30 +00:00
Xiang, Haihao
2f772dd67b s/flag_reg_nr/flag_subreg_nr for an instruction 
s/flagreg/flag_subreg_nr for a condition

They are flag subregister number indeed

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
 2013-03-04 15:54:30 +00:00