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Supporting half precision to single precision float convertion

Browse Source 
The f16to32 instruction converts the half precision float
in src0 to single precision float and storing in dst.

The f32to16 instruction converts the single precision float
in src0 to half precision float and storing in the lower word
of each channel in dst.
This commit is contained in:
Homer Hsing 2012-09-14 08:50:18 +08:00 committed by Damien Lespiau
parent 4285d9c2ce
commit b094cd8648
3 changed files with 6 additions and 1 deletions
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2
assembler/src/brw_defines.h
View File

@ -568,6 +568,8 @@
#define BRW_OPCODE_ASR 12
#define BRW_OPCODE_CMP 16
#define BRW_OPCODE_CMPN 17
#define BRW_OPCODE_F32TO16 19
#define BRW_OPCODE_F16TO32 20
#define BRW_OPCODE_BFREV 23
#define BRW_OPCODE_BFE 24
#define BRW_OPCODE_BFI1 25

3
assembler/src/gram.y
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@ -115,7 +115,7 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
%token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD
%token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2
%token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN
%token <integer> ADDC BFI1 BFREV CBIT
%token <integer> ADDC BFI1 BFREV CBIT F16TO32 F32TO16
%token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE
%token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL
%token <integer> MATH_INST
@ -418,6 +418,7 @@ unaryinstruction:
;
unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT
| F16TO32 | F32TO16
;
binaryinstruction:

2
assembler/src/lex.l
View File

@ -82,6 +82,8 @@ yylval.integer = BRW_CHANNEL_W;
"rndz" { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; }
"not" { yylval.integer = BRW_OPCODE_NOT; return NOT; }
"lzd" { yylval.integer = BRW_OPCODE_LZD; return LZD; }
"f16to32" { yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; }
"f32to16" { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; }
"mad" { yylval.integer = BRW_OPCODE_MAD; return MAD; }
"lrp" { yylval.integer = BRW_OPCODE_LRP; return LRP; }