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Supporting instruction Bit Field Insert 1
The bfi1 instruction component-wise generates mask with control from src0 and src1 and stores the results in dst.
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@ -569,6 +569,7 @@
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#define BRW_OPCODE_CMP 16
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#define BRW_OPCODE_CMPN 17
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#define BRW_OPCODE_BFE 24
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#define BRW_OPCODE_BFI1 25
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#define BRW_OPCODE_BFI2 26
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#define BRW_OPCODE_JMPI 32
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#define BRW_OPCODE_IF 34
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@ -115,7 +115,7 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
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%token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD
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%token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2
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%token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN
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%token <integer> ADDC
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%token <integer> ADDC BFI1
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%token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE
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%token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL
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%token <integer> MATH_INST
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@ -492,7 +492,7 @@ binaryaccinstruction:
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;
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binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | PLN
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| ADDC
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| ADDC | BFI1
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;
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trinaryop: MAD | LRP | BFE | BFI2
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@ -86,6 +86,7 @@ yylval.integer = BRW_CHANNEL_W;
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"mad" { yylval.integer = BRW_OPCODE_MAD; return MAD; }
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"lrp" { yylval.integer = BRW_OPCODE_LRP; return LRP; }
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"bfe" { yylval.integer = BRW_OPCODE_BFE; return BFE; }
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"bfi1" { yylval.integer = BRW_OPCODE_BFI1; return BFI1; }
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"bfi2" { yylval.integer = BRW_OPCODE_BFI2; return BFI2; }
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"mul" { yylval.integer = BRW_OPCODE_MUL; return MUL; }
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"mac" { yylval.integer = BRW_OPCODE_MAC; return MAC; }
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