338 Commits

Author SHA1 Message Date
Xiang, Haihao
737d248a12 assembler: distinguish the channel of .z from the condition of .z
The scratch patch only works for generic register

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631
Tested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19 22:49:25 +01:00
Xiang, Haihao
881afff297 assembler: switch the order of swizzle and regtype to match the BNF of the assembly
Fortunately our existing source didn't use swizzle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631
Tested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19 22:49:11 +01:00
Zhao Yakui
60a24a22ba Assembler/bdw: Remove the unsupported cache agent for WRITE(...)
The Sampler/Constant cache is read-only. And it can't be used as
the target cache agent of WRITE message.

Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-02-13 07:53:04 +00:00
Thomas Wood
e6737b8a4e assembler: fix condition for printing a warning
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-11 14:35:09 +01:00
Thomas Wood
c3e9198dd0 assembler: define YY_NO_INPUT to prevent unused symbol warnings
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-06 18:32:09 +01:00
Xiang, Haihao
3906a50ede assembler/bdw: Update write(...)
write(...) is used for Render Target Write and Media Block Write.
The two message types no longer share the same cache agent on GEN8,
So a parameter is needed for cache agent. The 4th parameter of write()
is used for write commit bit which has been removed since GEN7. Hence
we can re-use the 4th parameter as cache agent on GEN8

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-12-06 14:01:42 +00:00
Zhao Yakui
66783e4c4f assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+
This is required to send some messages to data port in GPU shader.
For example: media_block_write message.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Zhao Yakui
88e5f1fdf8 assembler/bdw: Add the support of align1 register-indirect addressing mode on Gen8
Otherwise it can't compile the following GPU shader that uses the
register-indirect addressing mode.
  >add.sat (16) r[a0.5,0]<1>:uw     r[a0.5,0]<16;16,1>:uw  0x0080:uw
  >add.sat (16) r[a0.5,32]<1>:uw    r[a0.5,32]<16;16,1>:uw 0x0080:uw

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
60c9b41e11 assembler/bdw: SEND instruction
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Ben Widawsky
3d8d094efe assembler/bdw: Small cleanup
This was originally part of:

commit 62298329350b965e4bbfc558e5a4b1b3646742ea
Author: Xiang, Haihao <haihao.xiang@intel.com>
Date:   Wed Aug 14 14:21:16 2013 -0700

    assembler: error for the wrong syntax of SEND instruction on GEN6+

I merged that patch separately, but this tiny hunk was leftover. In
order to not muck in changing too much history, I am leaving this as a
discrete patch, but with the changed commit message

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
bf05bd5531 assembler/bdw: Check & Refinement Engine message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
b6a33bdcce assembler/bdw: Video Motion Estimation(VME) message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
bf003ea634 assembler/bdw: Thread Spawn message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
01c9654a65 assembler/bdw: Data port message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
9d0287c252 assembler/bdw: Set thread switch for multiple branch instructions
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
216163b44d assembler/bdw: Set jip/uip offsets used by flow control instructions
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
2df4d3115a assembler/bdw: Disable mask control for advanced mode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Xiang, Haihao
220f165008 assembler/bdw: Set math function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Damien Lespiau
9cf8e1b79c assembler/bdw: Use gen8_set_exec_size() to set the execution size
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Damien Lespiau
f9e74fb494 assembler/bdw: Preliminary gen8 send & msgtarget support
Still some work needed there, but enough for rendercopy.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:40 -08:00
Damien Lespiau
bc3bf098a9 assembler/bdw: Add the start of a gen8 disassembler
Directly taken from Mesa.

v2 (Ben): Updated copyright

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:28 -08:00
Damien Lespiau
42d8d57c8c assembler/bdw: Make the validation functions take a brw_program_instruction
This allows to use the same functions to validate operands on gen8 for
now.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:34:36 -08:00
Damien Lespiau
af4d37de38 assembler/bdw: Support some basic gen8 intructions
We should now support alu2 intructions with direct register addressing.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:34:35 -08:00
Damien Lespiau
c3b36592af assembler/bdw: Add gen8_instruction from mesa
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:34:35 -08:00
Daniel Vetter
66c46ecc80 Update .gitignore a bit
- Ignore build-aux/
- Cleanup ignores for assembler/
2013-11-04 19:49:10 +01:00
Damien Lespiau
01283245ab assembler: Disable the declare test
It's not hitting a valid assertion that it tries to write an instruction
without a defined execution size (because the "default" exec_size never
end up being set).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:25:52 +01:00
Damien Lespiau
ca043f3a8f assembler: Disable tests that where already failing in the gen4asm repo
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:22:45 +01:00
Damien Lespiau
f8b25a3612 assembler: Ignore make check output
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:12:49 +01:00
Damien Lespiau
751f8a7378 assembler: Fix the path of intel-gen4asm
With the move to intel-gpu-tools, we need to update that as well.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:02:37 +01:00
Damien Lespiau
63720a4f86 assembler: Revert "Fix missing environment variables problem in test/run-test.sh"
Same as:

  commit 497814f2f2828efdc5bdd787ebc490d5083f61b8
  Author: Damien Lespiau <damien.lespiau@intel.com>
  Date:   Tue Aug 20 14:52:05 2013 +0100

      assembler: Revert "Automatically run all test cases."

make check will define srcdir and buildir variables for us.

This reverts commit 1c009349bc894bd195b5522540536898b0bee574.
2013-08-20 17:58:48 +01:00
Damien Lespiau
497814f2f2 assembler: Revert "Automatically run all test cases."
The tests where supposed to be run through make check, not running the
"run-test.sh" standalone. So revert that patch to have make check work
as intended.

This reverts commit 6983eebf47f37def8f2315d5af1800b81644f240.
2013-08-20 14:52:05 +01:00
Damien Lespiau
5959b8bb41 assembler: Tune the error message for invalid send on gen6+
And be a bit more descriptive.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 14:25:52 +01:00
Xiang, Haihao
6229832935 assembler: error for the wrong syntax of SEND instruction on GEN6+
predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions
   predicate SEND execsize dst sendleadreg payload imm32reg instoptions
   predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions
   predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions

The above four syntaxes are only used on legacy platforms which support implied move
from payload to dst.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-08-15 14:46:57 -07:00
Matt Turner
160feafa2d assembler: Add support for the SENDC instruction.
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
2013-05-22 13:58:36 -07:00
Damien Lespiau
4591991769 assembler: Mark format() as PRINTFLIKE in the disassembler
So when making changes in code using that function, we get warnings
about mismatches between the format string and arguments.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
92262e1ff8 assembler: Fix the decoding of the destination horizontal stride
dest_horizontal_stride needs go through the horiz_stride[] indirection
to pick up the rigth stride when its value is 11b (4 elements).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
d9afa5bfea assembler: Group the header inclusions together
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
f0365d40b4 assembler: Don't use GL types
sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \
       -e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \
       -e 's/GLshort/int16_t/g' assembler/*.[ch]

Drop the GL types here, they don't bring anything to the table. For
instance, GLuint has no guarantee to be 32 bits, so it does not make too
much sense to use it in structure describing hardware tables and
opcodes.

Of course, some bikeshedding can be applied to use uin32_t instead, I
figured that some of the GLuint are used without size constraints, so
a sed with uint32_t did not seem the right thing to do. On top of that
initial sed, one bothered enough could change the structures with size
constraints to actually use uint32_t.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
2d8b92a24b assembler: Remove trailing white space
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
2f502bcaaa assembler: Use defines for width
Instead of just using hardcoded numbers or resorting to ffs().

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
2de8b40c48 assembler: Merge declared_register's type into the reg structure
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
45d87d7f0b assembler: Finish importing brw_eu_*c from mesa
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
fa2b679cc9 assembler: Use set_instruction_src1() in send
No reason not to!

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
28ff66a13c assembler: Put struct opcode_desc back in brw_context.h
I originally moved struct opcode_desc from brw_context.h to brw_eu.h on
the mesa side, but that was before the realization we needed struct
brw_context if we wanted to not touch the code too much.

So put it back there now that the mesa patch has been dropped.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
e75faa3e43 assembler: Don't pollute the library files with gen4asm.h
gen4asm.h is assembler specific while we want the library files to be
somewhat of a proper library.

This means that we have to redefine the GL* typedefs for brw_structs.h,
not using any of thet GL typedef will be for a future commit.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
26da375471 assembler: Use brw_*() functions for 3-src instructions
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
67f3f949bf assembler: Add support for D and UD in 3-src instructions
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
a2a6583518 assembler: Expose setters for 3src operands
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
49861a03b6 assembler: Introduce set_instruction_saturate()
Also simplify the logic that was setting the saturate bit in the math
instruction.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00
Damien Lespiau
b21c2e60e9 assembler: Introduce set_intruction_pred_cond()
This allow us to factor out the test that checks if, when using both
predicates and conditional modifiers, we are using the same flag
register.

Also get rid of of a FIXME that we are now dealing with (the warning
mentioned above).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:41 +00:00