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https://github.com/tiagovignatti/intel-gpu-tools.git
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assembler: Use defines for width
Instead of just using hardcoded numbers or resorting to ffs(). Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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@ -618,7 +618,7 @@ declare_srcregion: /* empty */
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/* XXX is this default correct?*/
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memset (&$$, '\0', sizeof ($$));
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$$.vert_stride = ffs(0);
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$$.width = ffs(1) - 1;
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$$.width = BRW_WIDTH_1;
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$$.horiz_stride = ffs(0);
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}
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| SRCREGION EQ region
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@ -955,7 +955,7 @@ subroutineinstruction:
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set_instruction_opcode(&$$, $2);
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$4.type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */
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$4.width = 1; /* execution size must be 2. Here 1 is encoded 2. */
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$4.width = BRW_WIDTH_2; /* execution size must be 2. */
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set_instruction_dest(&$$, &$4);
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struct src_operand src0;
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@ -963,7 +963,7 @@ subroutineinstruction:
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src0.reg.type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */
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/* source0 region control must be <2,2,1>. */
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src0.reg.hstride = 1; /*encoded 1*/
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src0.reg.width = 1; /*encoded 2*/
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src0.reg.width = BRW_WIDTH_2;
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src0.reg.vstride = 2; /*encoded 2*/
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set_instruction_src0(&$$, &src0, NULL);
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@ -981,11 +981,11 @@ subroutineinstruction:
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memset(&$$, 0, sizeof($$));
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set_instruction_predicate(&$$, &$1);
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set_instruction_opcode(&$$, $2);
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dst_null_reg.width = 1; /* execution size of RET should be 2 */
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dst_null_reg.width = BRW_WIDTH_2; /* execution size of RET should be 2 */
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set_instruction_dest(&$$, &dst_null_reg);
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$5.reg.type = BRW_REGISTER_TYPE_D;
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$5.reg.hstride = 1; /*encoded 1*/
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$5.reg.width = 1; /*encoded 2*/
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$5.reg.width = BRW_WIDTH_2;
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$5.reg.vstride = 2; /*encoded 2*/
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set_instruction_src0(&$$, &$5, NULL);
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}
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@ -1351,7 +1351,7 @@ jumpinstruction: predicate JMPI execsize relativelocation2
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if(advanced_flag)
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GEN(&$$)->header.mask_control = BRW_MASK_DISABLE;
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set_instruction_predicate(&$$, &$1);
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ip_dst.width = ffs(1) - 1;
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ip_dst.width = BRW_WIDTH_1;
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set_instruction_dest(&$$, &ip_dst);
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set_instruction_src0(&$$, &ip_src, NULL);
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set_instruction_src1(&$$, &$4, NULL);
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@ -1407,7 +1407,7 @@ syncinstruction: predicate WAIT notifyreg
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memset(&$$, 0, sizeof($$));
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set_instruction_opcode(&$$, $2);
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set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D);
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notify_dst.width = ffs(1) - 1;
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notify_dst.width = BRW_WIDTH_1;
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set_instruction_dest(&$$, ¬ify_dst);
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set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D);
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set_instruction_src0(&$$, ¬ify_src, NULL);
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@ -2473,7 +2473,7 @@ region: /* empty */
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/* XXX is this default value correct?*/
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memset (&$$, '\0', sizeof ($$));
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$$.vert_stride = ffs(0);
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$$.width = ffs(1) - 1;
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$$.width = BRW_WIDTH_1;
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$$.horiz_stride = ffs(0);
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$$.is_default = 1;
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}
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@ -2482,7 +2482,7 @@ region: /* empty */
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/* XXX is this default value correct for accreg?*/
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memset (&$$, '\0', sizeof ($$));
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$$.vert_stride = ffs($2);
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$$.width = ffs(1) - 1;
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$$.width = BRW_WIDTH_1;
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$$.horiz_stride = ffs(0);
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}
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|LANGLE exp COMMA exp COMMA exp RANGLE
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@ -2783,7 +2783,7 @@ static void reset_instruction_src_region(struct brw_instruction *instr,
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if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
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((src->reg.nr & 0xF0) == BRW_ARF_ADDRESS)) {
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src->reg.vstride = ffs(0);
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src->reg.width = ffs(1) - 1;
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src->reg.width = BRW_WIDTH_1;
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src->reg.hstride = ffs(0);
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} else if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
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((src->reg.nr & 0xF0) == BRW_ARF_ACCUMULATOR)) {
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@ -2805,7 +2805,7 @@ static void reset_instruction_src_region(struct brw_instruction *instr,
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(src->reg.nr == BRW_ARF_NULL) &&
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(instr->header.opcode == BRW_OPCODE_SEND)) {
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src->reg.vstride = ffs(8);
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src->reg.width = ffs(8) - 1;
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src->reg.width = BRW_WIDTH_8;
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src->reg.hstride = ffs(1);
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} else {
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