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assembler: Expose setters for 3src operands
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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49861a03b6
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a2a6583518
@ -385,6 +385,23 @@ void brw_set_uip_jip(struct brw_compile *p);
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uint32_t brw_swap_cmod(uint32_t cmod);
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void
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brw_set_3src_dest(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg dest);
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void
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brw_set_3src_src0(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src0);
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void
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brw_set_3src_src1(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src1);
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void
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brw_set_3src_src2(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src2);
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/* brw_eu_compact.c */
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void brw_init_compaction_tables(struct intel_context *intel);
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void brw_compact_instructions(struct brw_compile *p);
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@ -813,15 +813,11 @@ get_3src_subreg_nr(struct brw_reg reg)
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}
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}
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static struct brw_instruction *brw_alu3(struct brw_compile *p,
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GLuint opcode,
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struct brw_reg dest,
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struct brw_reg src0,
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struct brw_reg src1,
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struct brw_reg src2)
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void
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brw_set_3src_dest(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg dest)
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{
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struct brw_instruction *insn = next_insn(p, opcode);
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gen7_convert_mrf_to_grf(p, &dest);
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assert(insn->header.access_mode == BRW_ALIGN_16);
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@ -836,7 +832,13 @@ static struct brw_instruction *brw_alu3(struct brw_compile *p,
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insn->bits1.da3src.dest_subreg_nr = dest.subnr / 16;
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insn->bits1.da3src.dest_writemask = dest.dw1.bits.writemask;
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guess_execution_size(p, insn, dest);
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}
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void
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brw_set_3src_src0(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src0)
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{
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assert(src0.file == BRW_GENERAL_REGISTER_FILE);
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assert(src0.address_mode == BRW_ADDRESS_DIRECT);
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assert(src0.nr < 128);
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@ -847,7 +849,13 @@ static struct brw_instruction *brw_alu3(struct brw_compile *p,
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insn->bits1.da3src.src0_abs = src0.abs;
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insn->bits1.da3src.src0_negate = src0.negate;
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insn->bits2.da3src.src0_rep_ctrl = src0.vstride == BRW_VERTICAL_STRIDE_0;
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}
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void
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brw_set_3src_src1(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src1)
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{
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assert(src1.file == BRW_GENERAL_REGISTER_FILE);
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assert(src1.address_mode == BRW_ADDRESS_DIRECT);
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assert(src1.nr < 128);
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@ -859,7 +867,13 @@ static struct brw_instruction *brw_alu3(struct brw_compile *p,
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insn->bits3.da3src.src1_reg_nr = src1.nr;
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insn->bits1.da3src.src1_abs = src1.abs;
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insn->bits1.da3src.src1_negate = src1.negate;
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}
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void
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brw_set_3src_src2(struct brw_compile *p,
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struct brw_instruction *insn,
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struct brw_reg src2)
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{
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assert(src2.file == BRW_GENERAL_REGISTER_FILE);
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assert(src2.address_mode == BRW_ADDRESS_DIRECT);
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assert(src2.nr < 128);
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@ -870,7 +884,20 @@ static struct brw_instruction *brw_alu3(struct brw_compile *p,
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insn->bits3.da3src.src2_reg_nr = src2.nr;
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insn->bits1.da3src.src2_abs = src2.abs;
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insn->bits1.da3src.src2_negate = src2.negate;
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}
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static struct brw_instruction *brw_alu3(struct brw_compile *p,
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GLuint opcode,
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struct brw_reg dest,
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struct brw_reg src0,
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struct brw_reg src1,
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struct brw_reg src2)
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{
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struct brw_instruction *insn = next_insn(p, opcode);
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brw_set_3src_dest(p, insn, dest);
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brw_set_3src_src0(p, insn, src0);
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brw_set_3src_src1(p, insn, src1);
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brw_set_3src_src2(p, insn, src2);
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return insn;
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}
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