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36 Commits

Author SHA1 Message Date
Eric Anholt
6db54d7465 Typo fix in comment. 2013-03-04 15:54:22 +00:00
Eric Anholt
1d7d04228e Rename direct_gen_reg struct to direct_reg now that it fills more roles. 2013-03-04 15:54:22 +00:00
Eric Anholt
5297b2a7e8 Support src ARF operands in another place, and spell it arch instead of acc. 2013-03-04 15:54:22 +00:00
Eric Anholt
2c7876583e Add support for more registers as source operands. 2013-03-04 15:54:22 +00:00
Eric Anholt
883408eab8 Add rules for more registers, and use some for destinations. 2013-03-04 15:54:22 +00:00
Eric Anholt
2cca382cd2 Rename the resulting binary to gen4asm instead of lextest. 2013-03-04 15:54:22 +00:00
Eric Anholt
c81a6084de Add a negation that the initial disasm missed. 2013-03-04 15:54:22 +00:00
Eric Anholt
f914c6ace2 Add many more opcodes. 2013-03-04 15:54:22 +00:00
Eric Anholt
569990bf6b Lex the register number with the register name. 
This avoids the need for a start condition to prevent for example g1.8<0,1,0>UW
being lexed as GENREG NUMBER LANGLE etc. rather than
GENREG INTEGER DOT INTEGER LANGLE etc.
 2013-03-04 15:54:22 +00:00
Eric Anholt
3d36079ae3 Add syntax for extended math send functions, and adjust packed_yuv_sf for it. 2013-03-04 15:54:22 +00:00
Eric Anholt
e865196a9d Add a syntax for urb write messages. 2013-03-04 15:54:21 +00:00
Eric Anholt
5232981c88 Add some more generated files to ignore. 2013-03-04 15:54:21 +00:00
Eric Anholt
bf0b5ddbe7 Add packed yuv sf kernel from 2d driver. 2013-03-04 15:54:21 +00:00
Eric Anholt
43313946e7 Add syntax for translating the DP write send message. 2013-03-04 15:54:21 +00:00
Eric Anholt
16324215b2 Fix respecting of instruction options (misunderstood default action behavior). 2013-03-04 15:54:21 +00:00
Eric Anholt
56c4ccfc19 Fix up sampler send message translation and give it a near-usable syntax. 2013-03-04 15:54:21 +00:00
Eric Anholt
e609d6ba93 Zero out the initial header instoptions. 2013-03-04 15:54:21 +00:00
Eric Anholt
2093218bcd There's no reason to provide typing or region on the null register. 2013-03-04 15:54:21 +00:00
Eric Anholt
56b50b6803 bzero instructions before filling in the bits we care about. 
This avoids some set bits in padding fields.
 2013-03-04 15:54:21 +00:00
Eric Anholt
7c330fbf3a Fill in type of null register to match Mesa. 2013-03-04 15:54:21 +00:00
Eric Anholt
ac32bb09eb This code was supposed to be null instead of acc0 (brw_disasm.c gave "a0"). 2013-03-04 15:54:21 +00:00
Eric Anholt
a34d1e0d8c Fix translation of message registers. 2013-03-04 15:54:21 +00:00
Eric Anholt
90aea51983 Fix translation of saturate value, and wire conditionalmod to 0 for now. 2013-03-04 15:54:21 +00:00
Eric Anholt
b9e6224587 Remove generated source from repo. 2013-03-04 15:54:21 +00:00
Eric Anholt
dc96c56d9e Add support for negate and abs to source operands. 2013-03-04 15:54:21 +00:00
Eric Anholt
0d929b430b Fix imm32 translation. 2013-03-04 15:54:20 +00:00
Eric Anholt
0edcb2561d Fix dest_horiz_stride translation, and destination type. 2013-03-04 15:54:20 +00:00
Eric Anholt
b798c7c9da And add a comma. This was supposed to be a minor change. 2013-03-04 15:54:20 +00:00
Eric Anholt
fc022c1bc2 Remove generated file. 2013-03-04 15:54:20 +00:00
Eric Anholt
d4c82e8278 Fix horizontal stride translation. 2013-03-04 15:54:20 +00:00
Eric Anholt
f2f18561e5 C warnings cleanup. 2013-03-04 15:54:20 +00:00
Eric Anholt
1c62350848 Add Wall. 2013-03-04 15:54:20 +00:00
Eric Anholt
a58d896dfe actually print out last uint32_t of instruction. 2013-03-04 15:54:20 +00:00
Eric Anholt
19f1c1cec4 Start correcting the translation. 2013-03-04 15:54:20 +00:00
Eric Anholt
6c98c8d578 Get the wm program to parse. 2013-03-04 15:54:20 +00:00
Eric Anholt
22a1063cc0 Initial gen4asm code. 2013-03-04 15:54:20 +00:00