mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-09 17:06:14 +00:00
Initial gen4asm code.
This commit is contained in:
parent
7ee278f176
commit
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1
assembler/.gitignore
vendored
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assembler/.gitignore
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lextest
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11
assembler/Makefile
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assembler/Makefile
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SOURCES = lex.c main.c gram.c
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all: lextest
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y.tab.h: gram.c
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lextest: ${SOURCES}
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cc -o lextest ${SOURCES}
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clean:
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rm -f *.o lextest
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845
assembler/brw_defines.h
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assembler/brw_defines.h
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/**************************************************************************
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*
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* Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#ifndef BRW_DEFINES_H
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#define BRW_DEFINES_H
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/*
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*/
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#define MI_NOOP 0x00
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#define MI_USER_INTERRUPT 0x02
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#define MI_WAIT_FOR_EVENT 0x03
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#define MI_FLUSH 0x04
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#define MI_REPORT_HEAD 0x07
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#define MI_ARB_ON_OFF 0x08
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#define MI_BATCH_BUFFER_END 0x0A
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#define MI_OVERLAY_FLIP 0x11
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#define MI_LOAD_SCAN_LINES_INCL 0x12
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#define MI_LOAD_SCAN_LINES_EXCL 0x13
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#define MI_DISPLAY_BUFFER_INFO 0x14
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#define MI_SET_CONTEXT 0x18
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#define MI_STORE_DATA_IMM 0x20
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#define MI_STORE_DATA_INDEX 0x21
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#define MI_LOAD_REGISTER_IMM 0x22
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#define MI_STORE_REGISTER_MEM 0x24
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#define MI_BATCH_BUFFER_START 0x31
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#define MI_SYNCHRONOUS_FLIP 0x0
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#define MI_ASYNCHRONOUS_FLIP 0x1
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#define MI_BUFFER_SECURE 0x0
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#define MI_BUFFER_NONSECURE 0x1
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#define MI_ARBITRATE_AT_CHAIN_POINTS 0x0
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#define MI_ARBITRATE_BETWEEN_INSTS 0x1
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#define MI_NO_ARBITRATION 0x3
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#define MI_CONDITION_CODE_WAIT_DISABLED 0x0
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#define MI_CONDITION_CODE_WAIT_0 0x1
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#define MI_CONDITION_CODE_WAIT_1 0x2
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#define MI_CONDITION_CODE_WAIT_2 0x3
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#define MI_CONDITION_CODE_WAIT_3 0x4
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#define MI_CONDITION_CODE_WAIT_4 0x5
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#define MI_DISPLAY_PIPE_A 0x0
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#define MI_DISPLAY_PIPE_B 0x1
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#define MI_DISPLAY_PLANE_A 0x0
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#define MI_DISPLAY_PLANE_B 0x1
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#define MI_DISPLAY_PLANE_C 0x2
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#define MI_STANDARD_FLIP 0x0
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#define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1
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#define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2
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#define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3
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#define MI_PHYSICAL_ADDRESS 0x0
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#define MI_VIRTUAL_ADDRESS 0x1
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#define MI_BUFFER_MEMORY_MAIN 0x0
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#define MI_BUFFER_MEMORY_GTT 0x2
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#define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3
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#define MI_FLIP_CONTINUE 0x0
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#define MI_FLIP_ON 0x1
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#define MI_FLIP_OFF 0x2
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#define MI_UNTRUSTED_REGISTER_SPACE 0x0
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#define MI_TRUSTED_REGISTER_SPACE 0x1
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/* 3D state:
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*/
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#define _3DOP_3DSTATE_PIPELINED 0x0
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#define _3DOP_3DSTATE_NONPIPELINED 0x1
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#define _3DOP_3DCONTROL 0x2
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#define _3DOP_3DPRIMITIVE 0x3
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#define _3DSTATE_PIPELINED_POINTERS 0x00
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#define _3DSTATE_BINDING_TABLE_POINTERS 0x01
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#define _3DSTATE_VERTEX_BUFFERS 0x08
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#define _3DSTATE_VERTEX_ELEMENTS 0x09
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#define _3DSTATE_INDEX_BUFFER 0x0A
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#define _3DSTATE_VF_STATISTICS 0x0B
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#define _3DSTATE_DRAWING_RECTANGLE 0x00
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#define _3DSTATE_CONSTANT_COLOR 0x01
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#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02
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#define _3DSTATE_CHROMA_KEY 0x04
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#define _3DSTATE_DEPTH_BUFFER 0x05
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#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06
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#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07
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#define _3DSTATE_LINE_STIPPLE 0x08
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#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09
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#define _3DCONTROL 0x00
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#define _3DPRIMITIVE 0x00
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#define PIPE_CONTROL_NOWRITE 0x00
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#define PIPE_CONTROL_WRITEIMMEDIATE 0x01
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#define PIPE_CONTROL_WRITEDEPTH 0x02
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#define PIPE_CONTROL_WRITETIMESTAMP 0x03
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#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00
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#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01
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#define _3DPRIM_POINTLIST 0x01
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#define _3DPRIM_LINELIST 0x02
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#define _3DPRIM_LINESTRIP 0x03
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#define _3DPRIM_TRILIST 0x04
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#define _3DPRIM_TRISTRIP 0x05
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#define _3DPRIM_TRIFAN 0x06
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#define _3DPRIM_QUADLIST 0x07
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#define _3DPRIM_QUADSTRIP 0x08
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#define _3DPRIM_LINELIST_ADJ 0x09
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#define _3DPRIM_LINESTRIP_ADJ 0x0A
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#define _3DPRIM_TRILIST_ADJ 0x0B
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#define _3DPRIM_TRISTRIP_ADJ 0x0C
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#define _3DPRIM_TRISTRIP_REVERSE 0x0D
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#define _3DPRIM_POLYGON 0x0E
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#define _3DPRIM_RECTLIST 0x0F
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#define _3DPRIM_LINELOOP 0x10
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#define _3DPRIM_POINTLIST_BF 0x11
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#define _3DPRIM_LINESTRIP_CONT 0x12
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#define _3DPRIM_LINESTRIP_BF 0x13
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#define _3DPRIM_LINESTRIP_CONT_BF 0x14
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#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
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#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0
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#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1
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#define BRW_ANISORATIO_2 0
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#define BRW_ANISORATIO_4 1
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#define BRW_ANISORATIO_6 2
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#define BRW_ANISORATIO_8 3
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#define BRW_ANISORATIO_10 4
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#define BRW_ANISORATIO_12 5
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#define BRW_ANISORATIO_14 6
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#define BRW_ANISORATIO_16 7
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#define BRW_BLENDFACTOR_ONE 0x1
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#define BRW_BLENDFACTOR_SRC_COLOR 0x2
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#define BRW_BLENDFACTOR_SRC_ALPHA 0x3
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#define BRW_BLENDFACTOR_DST_ALPHA 0x4
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#define BRW_BLENDFACTOR_DST_COLOR 0x5
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#define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
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#define BRW_BLENDFACTOR_CONST_COLOR 0x7
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#define BRW_BLENDFACTOR_CONST_ALPHA 0x8
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#define BRW_BLENDFACTOR_SRC1_COLOR 0x9
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#define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A
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#define BRW_BLENDFACTOR_ZERO 0x11
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#define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12
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#define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13
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#define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14
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#define BRW_BLENDFACTOR_INV_DST_COLOR 0x15
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#define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17
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#define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18
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#define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19
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#define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
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#define BRW_BLENDFUNCTION_ADD 0
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#define BRW_BLENDFUNCTION_SUBTRACT 1
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#define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2
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#define BRW_BLENDFUNCTION_MIN 3
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#define BRW_BLENDFUNCTION_MAX 4
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#define BRW_ALPHATEST_FORMAT_UNORM8 0
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#define BRW_ALPHATEST_FORMAT_FLOAT32 1
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#define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0
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#define BRW_CHROMAKEY_REPLACE_BLACK 1
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#define BRW_CLIP_API_OGL 0
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#define BRW_CLIP_API_DX 1
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#define BRW_CLIPMODE_NORMAL 0
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#define BRW_CLIPMODE_CLIP_ALL 1
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#define BRW_CLIPMODE_CLIP_NON_REJECTED 2
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#define BRW_CLIPMODE_REJECT_ALL 3
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#define BRW_CLIPMODE_ACCEPT_ALL 4
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#define BRW_CLIP_NDCSPACE 0
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#define BRW_CLIP_SCREENSPACE 1
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#define BRW_COMPAREFUNCTION_ALWAYS 0
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#define BRW_COMPAREFUNCTION_NEVER 1
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#define BRW_COMPAREFUNCTION_LESS 2
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#define BRW_COMPAREFUNCTION_EQUAL 3
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#define BRW_COMPAREFUNCTION_LEQUAL 4
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#define BRW_COMPAREFUNCTION_GREATER 5
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#define BRW_COMPAREFUNCTION_NOTEQUAL 6
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#define BRW_COMPAREFUNCTION_GEQUAL 7
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#define BRW_COVERAGE_PIXELS_HALF 0
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#define BRW_COVERAGE_PIXELS_1 1
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#define BRW_COVERAGE_PIXELS_2 2
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#define BRW_COVERAGE_PIXELS_4 3
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#define BRW_CULLMODE_BOTH 0
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#define BRW_CULLMODE_NONE 1
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#define BRW_CULLMODE_FRONT 2
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#define BRW_CULLMODE_BACK 3
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#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0
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#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
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#define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
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#define BRW_DEPTHFORMAT_D32_FLOAT 1
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#define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2
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#define BRW_DEPTHFORMAT_D16_UNORM 5
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#define BRW_FLOATING_POINT_IEEE_754 0
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#define BRW_FLOATING_POINT_NON_IEEE_754 1
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#define BRW_FRONTWINDING_CW 0
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#define BRW_FRONTWINDING_CCW 1
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#define BRW_INDEX_BYTE 0
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#define BRW_INDEX_WORD 1
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#define BRW_INDEX_DWORD 2
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#define BRW_LOGICOPFUNCTION_CLEAR 0
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#define BRW_LOGICOPFUNCTION_NOR 1
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#define BRW_LOGICOPFUNCTION_AND_INVERTED 2
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#define BRW_LOGICOPFUNCTION_COPY_INVERTED 3
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#define BRW_LOGICOPFUNCTION_AND_REVERSE 4
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#define BRW_LOGICOPFUNCTION_INVERT 5
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#define BRW_LOGICOPFUNCTION_XOR 6
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#define BRW_LOGICOPFUNCTION_NAND 7
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#define BRW_LOGICOPFUNCTION_AND 8
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#define BRW_LOGICOPFUNCTION_EQUIV 9
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#define BRW_LOGICOPFUNCTION_NOOP 10
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#define BRW_LOGICOPFUNCTION_OR_INVERTED 11
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#define BRW_LOGICOPFUNCTION_COPY 12
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#define BRW_LOGICOPFUNCTION_OR_REVERSE 13
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#define BRW_LOGICOPFUNCTION_OR 14
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#define BRW_LOGICOPFUNCTION_SET 15
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#define BRW_MAPFILTER_NEAREST 0x0
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#define BRW_MAPFILTER_LINEAR 0x1
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#define BRW_MAPFILTER_ANISOTROPIC 0x2
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#define BRW_MIPFILTER_NONE 0
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#define BRW_MIPFILTER_NEAREST 1
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#define BRW_MIPFILTER_LINEAR 3
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#define BRW_POLYGON_FRONT_FACING 0
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#define BRW_POLYGON_BACK_FACING 1
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#define BRW_PREFILTER_ALWAYS 0x0
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#define BRW_PREFILTER_NEVER 0x1
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#define BRW_PREFILTER_LESS 0x2
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#define BRW_PREFILTER_EQUAL 0x3
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#define BRW_PREFILTER_LEQUAL 0x4
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#define BRW_PREFILTER_GREATER 0x5
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#define BRW_PREFILTER_NOTEQUAL 0x6
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#define BRW_PREFILTER_GEQUAL 0x7
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#define BRW_PROVOKING_VERTEX_0 0
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#define BRW_PROVOKING_VERTEX_1 1
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#define BRW_PROVOKING_VERTEX_2 2
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#define BRW_RASTRULE_UPPER_LEFT 0
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#define BRW_RASTRULE_UPPER_RIGHT 1
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#define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0
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#define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1
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#define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2
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#define BRW_STENCILOP_KEEP 0
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#define BRW_STENCILOP_ZERO 1
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#define BRW_STENCILOP_REPLACE 2
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#define BRW_STENCILOP_INCRSAT 3
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#define BRW_STENCILOP_DECRSAT 4
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#define BRW_STENCILOP_INCR 5
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#define BRW_STENCILOP_DECR 6
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#define BRW_STENCILOP_INVERT 7
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#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
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#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
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#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
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#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
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#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
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#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
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#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
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#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
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#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
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#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
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#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
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#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
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#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
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#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
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#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
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#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
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#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
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#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
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#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
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#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
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#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
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||||
#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
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#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
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||||
#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
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||||
#define BRW_SURFACEFORMAT_R32G32_SINT 0x086
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#define BRW_SURFACEFORMAT_R32G32_UINT 0x087
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#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
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||||
#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
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#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
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#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
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#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
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#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
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#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
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#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
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#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
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#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
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#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
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#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
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#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095
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#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096
|
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#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
|
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#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
|
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#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
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#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
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#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
|
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#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
|
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#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
|
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#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
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#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
|
||||
#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
|
||||
#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
|
||||
#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
|
||||
#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
|
||||
#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
|
||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
|
||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
|
||||
#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
|
||||
#define BRW_SURFACEFORMAT_R32_SINT 0x0D6
|
||||
#define BRW_SURFACEFORMAT_R32_UINT 0x0D7
|
||||
#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
|
||||
#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
|
||||
#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
|
||||
#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
|
||||
#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
|
||||
#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
|
||||
#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
|
||||
#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
|
||||
#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
|
||||
#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
|
||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
|
||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
|
||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
|
||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
|
||||
#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
|
||||
#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
|
||||
#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
|
||||
#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
|
||||
#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
|
||||
#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
|
||||
#define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6
|
||||
#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7
|
||||
#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8
|
||||
#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9
|
||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
|
||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
|
||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
|
||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
|
||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
|
||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
|
||||
#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
|
||||
#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
|
||||
#define BRW_SURFACEFORMAT_R8G8_SINT 0x108
|
||||
#define BRW_SURFACEFORMAT_R8G8_UINT 0x109
|
||||
#define BRW_SURFACEFORMAT_R16_UNORM 0x10A
|
||||
#define BRW_SURFACEFORMAT_R16_SNORM 0x10B
|
||||
#define BRW_SURFACEFORMAT_R16_SINT 0x10C
|
||||
#define BRW_SURFACEFORMAT_R16_UINT 0x10D
|
||||
#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
|
||||
#define BRW_SURFACEFORMAT_I16_UNORM 0x111
|
||||
#define BRW_SURFACEFORMAT_L16_UNORM 0x112
|
||||
#define BRW_SURFACEFORMAT_A16_UNORM 0x113
|
||||
#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
|
||||
#define BRW_SURFACEFORMAT_I16_FLOAT 0x115
|
||||
#define BRW_SURFACEFORMAT_L16_FLOAT 0x116
|
||||
#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
|
||||
#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
|
||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
|
||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
|
||||
#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C
|
||||
#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
|
||||
#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E
|
||||
#define BRW_SURFACEFORMAT_R16_USCALED 0x11F
|
||||
#define BRW_SURFACEFORMAT_R8_UNORM 0x140
|
||||
#define BRW_SURFACEFORMAT_R8_SNORM 0x141
|
||||
#define BRW_SURFACEFORMAT_R8_SINT 0x142
|
||||
#define BRW_SURFACEFORMAT_R8_UINT 0x143
|
||||
#define BRW_SURFACEFORMAT_A8_UNORM 0x144
|
||||
#define BRW_SURFACEFORMAT_I8_UNORM 0x145
|
||||
#define BRW_SURFACEFORMAT_L8_UNORM 0x146
|
||||
#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
|
||||
#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
|
||||
#define BRW_SURFACEFORMAT_R8_SSCALED 0x149
|
||||
#define BRW_SURFACEFORMAT_R8_USCALED 0x14A
|
||||
#define BRW_SURFACEFORMAT_R1_UINT 0x181
|
||||
#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
|
||||
#define BRW_SURFACEFORMAT_BC1_UNORM 0x186
|
||||
#define BRW_SURFACEFORMAT_BC2_UNORM 0x187
|
||||
#define BRW_SURFACEFORMAT_BC3_UNORM 0x188
|
||||
#define BRW_SURFACEFORMAT_BC4_UNORM 0x189
|
||||
#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
|
||||
#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
|
||||
#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
|
||||
#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
|
||||
#define BRW_SURFACEFORMAT_MONO8 0x18E
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
|
||||
#define BRW_SURFACEFORMAT_DXT1_RGB 0x191
|
||||
#define BRW_SURFACEFORMAT_FXT1 0x192
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
|
||||
#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
|
||||
#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
|
||||
#define BRW_SURFACEFORMAT_BC4_SNORM 0x199
|
||||
#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F
|
||||
|
||||
#define BRW_SURFACERETURNFORMAT_FLOAT32 0
|
||||
#define BRW_SURFACERETURNFORMAT_S1 1
|
||||
|
||||
#define BRW_SURFACE_1D 0
|
||||
#define BRW_SURFACE_2D 1
|
||||
#define BRW_SURFACE_3D 2
|
||||
#define BRW_SURFACE_CUBE 3
|
||||
#define BRW_SURFACE_BUFFER 4
|
||||
#define BRW_SURFACE_NULL 7
|
||||
|
||||
#define BRW_TEXCOORDMODE_WRAP 0
|
||||
#define BRW_TEXCOORDMODE_MIRROR 1
|
||||
#define BRW_TEXCOORDMODE_CLAMP 2
|
||||
#define BRW_TEXCOORDMODE_CUBE 3
|
||||
#define BRW_TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define BRW_TEXCOORDMODE_MIRROR_ONCE 5
|
||||
|
||||
#define BRW_THREAD_PRIORITY_NORMAL 0
|
||||
#define BRW_THREAD_PRIORITY_HIGH 1
|
||||
|
||||
#define BRW_TILEWALK_XMAJOR 0
|
||||
#define BRW_TILEWALK_YMAJOR 1
|
||||
|
||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0
|
||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1
|
||||
|
||||
#define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0
|
||||
#define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1
|
||||
|
||||
#define BRW_VFCOMPONENT_NOSTORE 0
|
||||
#define BRW_VFCOMPONENT_STORE_SRC 1
|
||||
#define BRW_VFCOMPONENT_STORE_0 2
|
||||
#define BRW_VFCOMPONENT_STORE_1_FLT 3
|
||||
#define BRW_VFCOMPONENT_STORE_1_INT 4
|
||||
#define BRW_VFCOMPONENT_STORE_VID 5
|
||||
#define BRW_VFCOMPONENT_STORE_IID 6
|
||||
#define BRW_VFCOMPONENT_STORE_PID 7
|
||||
|
||||
|
||||
|
||||
/* Execution Unit (EU) defines
|
||||
*/
|
||||
|
||||
#define BRW_ALIGN_1 0
|
||||
#define BRW_ALIGN_16 1
|
||||
|
||||
#define BRW_ADDRESS_DIRECT 0
|
||||
#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1
|
||||
|
||||
#define BRW_CHANNEL_X 0
|
||||
#define BRW_CHANNEL_Y 1
|
||||
#define BRW_CHANNEL_Z 2
|
||||
#define BRW_CHANNEL_W 3
|
||||
|
||||
#define BRW_COMPRESSION_NONE 0
|
||||
#define BRW_COMPRESSION_2NDHALF 1
|
||||
#define BRW_COMPRESSION_COMPRESSED 2
|
||||
|
||||
#define BRW_CONDITIONAL_NONE 0
|
||||
#define BRW_CONDITIONAL_Z 1
|
||||
#define BRW_CONDITIONAL_NZ 2
|
||||
#define BRW_CONDITIONAL_EQ 1 /* Z */
|
||||
#define BRW_CONDITIONAL_NEQ 2 /* NZ */
|
||||
#define BRW_CONDITIONAL_G 3
|
||||
#define BRW_CONDITIONAL_GE 4
|
||||
#define BRW_CONDITIONAL_L 5
|
||||
#define BRW_CONDITIONAL_LE 6
|
||||
#define BRW_CONDITIONAL_C 7
|
||||
#define BRW_CONDITIONAL_O 8
|
||||
|
||||
#define BRW_DEBUG_NONE 0
|
||||
#define BRW_DEBUG_BREAKPOINT 1
|
||||
|
||||
#define BRW_DEPENDENCY_NORMAL 0
|
||||
#define BRW_DEPENDENCY_NOTCLEARED 1
|
||||
#define BRW_DEPENDENCY_NOTCHECKED 2
|
||||
#define BRW_DEPENDENCY_DISABLE 3
|
||||
|
||||
#define BRW_EXECUTE_1 0
|
||||
#define BRW_EXECUTE_2 1
|
||||
#define BRW_EXECUTE_4 2
|
||||
#define BRW_EXECUTE_8 3
|
||||
#define BRW_EXECUTE_16 4
|
||||
#define BRW_EXECUTE_32 5
|
||||
|
||||
#define BRW_HORIZONTAL_STRIDE_0 0
|
||||
#define BRW_HORIZONTAL_STRIDE_1 1
|
||||
#define BRW_HORIZONTAL_STRIDE_2 2
|
||||
#define BRW_HORIZONTAL_STRIDE_4 3
|
||||
|
||||
#define BRW_INSTRUCTION_NORMAL 0
|
||||
#define BRW_INSTRUCTION_SATURATE 1
|
||||
|
||||
#define BRW_MASK_ENABLE 0
|
||||
#define BRW_MASK_DISABLE 1
|
||||
|
||||
#define BRW_OPCODE_MOV 1
|
||||
#define BRW_OPCODE_SEL 2
|
||||
#define BRW_OPCODE_NOT 4
|
||||
#define BRW_OPCODE_AND 5
|
||||
#define BRW_OPCODE_OR 6
|
||||
#define BRW_OPCODE_XOR 7
|
||||
#define BRW_OPCODE_SHR 8
|
||||
#define BRW_OPCODE_SHL 9
|
||||
#define BRW_OPCODE_RSR 10
|
||||
#define BRW_OPCODE_RSL 11
|
||||
#define BRW_OPCODE_ASR 12
|
||||
#define BRW_OPCODE_CMP 16
|
||||
#define BRW_OPCODE_JMPI 32
|
||||
#define BRW_OPCODE_IF 34
|
||||
#define BRW_OPCODE_IFF 35
|
||||
#define BRW_OPCODE_ELSE 36
|
||||
#define BRW_OPCODE_ENDIF 37
|
||||
#define BRW_OPCODE_DO 38
|
||||
#define BRW_OPCODE_WHILE 39
|
||||
#define BRW_OPCODE_BREAK 40
|
||||
#define BRW_OPCODE_CONTINUE 41
|
||||
#define BRW_OPCODE_HALT 42
|
||||
#define BRW_OPCODE_MSAVE 44
|
||||
#define BRW_OPCODE_MRESTORE 45
|
||||
#define BRW_OPCODE_PUSH 46
|
||||
#define BRW_OPCODE_POP 47
|
||||
#define BRW_OPCODE_WAIT 48
|
||||
#define BRW_OPCODE_SEND 49
|
||||
#define BRW_OPCODE_ADD 64
|
||||
#define BRW_OPCODE_MUL 65
|
||||
#define BRW_OPCODE_AVG 66
|
||||
#define BRW_OPCODE_FRC 67
|
||||
#define BRW_OPCODE_RNDU 68
|
||||
#define BRW_OPCODE_RNDD 69
|
||||
#define BRW_OPCODE_RNDE 70
|
||||
#define BRW_OPCODE_RNDZ 71
|
||||
#define BRW_OPCODE_MAC 72
|
||||
#define BRW_OPCODE_MACH 73
|
||||
#define BRW_OPCODE_LZD 74
|
||||
#define BRW_OPCODE_SAD2 80
|
||||
#define BRW_OPCODE_SADA2 81
|
||||
#define BRW_OPCODE_DP4 84
|
||||
#define BRW_OPCODE_DPH 85
|
||||
#define BRW_OPCODE_DP3 86
|
||||
#define BRW_OPCODE_DP2 87
|
||||
#define BRW_OPCODE_DPA2 88
|
||||
#define BRW_OPCODE_LINE 89
|
||||
#define BRW_OPCODE_NOP 126
|
||||
|
||||
#define BRW_PREDICATE_NONE 0
|
||||
#define BRW_PREDICATE_NORMAL 1
|
||||
#define BRW_PREDICATE_ALIGN1_ANYV 2
|
||||
#define BRW_PREDICATE_ALIGN1_ALLV 3
|
||||
#define BRW_PREDICATE_ALIGN1_ANY2H 4
|
||||
#define BRW_PREDICATE_ALIGN1_ALL2H 5
|
||||
#define BRW_PREDICATE_ALIGN1_ANY4H 6
|
||||
#define BRW_PREDICATE_ALIGN1_ALL4H 7
|
||||
#define BRW_PREDICATE_ALIGN1_ANY8H 8
|
||||
#define BRW_PREDICATE_ALIGN1_ALL8H 9
|
||||
#define BRW_PREDICATE_ALIGN1_ANY16H 10
|
||||
#define BRW_PREDICATE_ALIGN1_ALL16H 11
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_X 2
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_W 5
|
||||
#define BRW_PREDICATE_ALIGN16_ANY4H 6
|
||||
#define BRW_PREDICATE_ALIGN16_ALL4H 7
|
||||
|
||||
#define BRW_ARCHITECTURE_REGISTER_FILE 0
|
||||
#define BRW_GENERAL_REGISTER_FILE 1
|
||||
#define BRW_MESSAGE_REGISTER_FILE 2
|
||||
#define BRW_IMMEDIATE_VALUE 3
|
||||
|
||||
#define BRW_REGISTER_TYPE_UD 0
|
||||
#define BRW_REGISTER_TYPE_D 1
|
||||
#define BRW_REGISTER_TYPE_UW 2
|
||||
#define BRW_REGISTER_TYPE_W 3
|
||||
#define BRW_REGISTER_TYPE_UB 4
|
||||
#define BRW_REGISTER_TYPE_B 5
|
||||
#define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
|
||||
#define BRW_REGISTER_TYPE_HF 6
|
||||
#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
|
||||
#define BRW_REGISTER_TYPE_F 7
|
||||
|
||||
#define BRW_ARF_NULL 0x00
|
||||
#define BRW_ARF_ADDRESS 0x10
|
||||
#define BRW_ARF_ACCUMULATOR 0x20
|
||||
#define BRW_ARF_FLAG 0x30
|
||||
#define BRW_ARF_MASK 0x40
|
||||
#define BRW_ARF_MASK_STACK 0x50
|
||||
#define BRW_ARF_MASK_STACK_DEPTH 0x60
|
||||
#define BRW_ARF_STATE 0x70
|
||||
#define BRW_ARF_CONTROL 0x80
|
||||
#define BRW_ARF_NOTIFICATION_COUNT 0x90
|
||||
#define BRW_ARF_IP 0xA0
|
||||
|
||||
#define BRW_AMASK 0
|
||||
#define BRW_IMASK 1
|
||||
#define BRW_LMASK 2
|
||||
#define BRW_CMASK 3
|
||||
|
||||
|
||||
|
||||
#define BRW_THREAD_NORMAL 0
|
||||
#define BRW_THREAD_ATOMIC 1
|
||||
#define BRW_THREAD_SWITCH 2
|
||||
|
||||
#define BRW_VERTICAL_STRIDE_0 0
|
||||
#define BRW_VERTICAL_STRIDE_1 1
|
||||
#define BRW_VERTICAL_STRIDE_2 2
|
||||
#define BRW_VERTICAL_STRIDE_4 3
|
||||
#define BRW_VERTICAL_STRIDE_8 4
|
||||
#define BRW_VERTICAL_STRIDE_16 5
|
||||
#define BRW_VERTICAL_STRIDE_32 6
|
||||
#define BRW_VERTICAL_STRIDE_64 7
|
||||
#define BRW_VERTICAL_STRIDE_128 8
|
||||
#define BRW_VERTICAL_STRIDE_256 9
|
||||
#define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
|
||||
|
||||
#define BRW_WIDTH_1 0
|
||||
#define BRW_WIDTH_2 1
|
||||
#define BRW_WIDTH_4 2
|
||||
#define BRW_WIDTH_8 3
|
||||
#define BRW_WIDTH_16 4
|
||||
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1K 0
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2K 1
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_4K 2
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_8K 3
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_128K 7
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_256K 8
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_512K 9
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1M 10
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2M 11
|
||||
|
||||
#define BRW_POLYGON_FACING_FRONT 0
|
||||
#define BRW_POLYGON_FACING_BACK 1
|
||||
|
||||
#define BRW_MESSAGE_TARGET_NULL 0
|
||||
#define BRW_MESSAGE_TARGET_MATH 1
|
||||
#define BRW_MESSAGE_TARGET_SAMPLER 2
|
||||
#define BRW_MESSAGE_TARGET_GATEWAY 3
|
||||
#define BRW_MESSAGE_TARGET_DATAPORT_READ 4
|
||||
#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5
|
||||
#define BRW_MESSAGE_TARGET_URB 6
|
||||
#define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7
|
||||
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_UINT32 2
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_SINT32 3
|
||||
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_LD 3
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_LD 3
|
||||
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4
|
||||
|
||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
|
||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
|
||||
|
||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
|
||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
|
||||
|
||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
|
||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
|
||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2
|
||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
|
||||
|
||||
#define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0
|
||||
#define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1
|
||||
#define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
|
||||
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
|
||||
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
|
||||
|
||||
#define BRW_MATH_FUNCTION_INV 1
|
||||
#define BRW_MATH_FUNCTION_LOG 2
|
||||
#define BRW_MATH_FUNCTION_EXP 3
|
||||
#define BRW_MATH_FUNCTION_SQRT 4
|
||||
#define BRW_MATH_FUNCTION_RSQ 5
|
||||
#define BRW_MATH_FUNCTION_SIN 6 /* was 7 */
|
||||
#define BRW_MATH_FUNCTION_COS 7 /* was 8 */
|
||||
#define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */
|
||||
#define BRW_MATH_FUNCTION_TAN 9
|
||||
#define BRW_MATH_FUNCTION_POW 10
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13
|
||||
|
||||
#define BRW_MATH_INTEGER_UNSIGNED 0
|
||||
#define BRW_MATH_INTEGER_SIGNED 1
|
||||
|
||||
#define BRW_MATH_PRECISION_FULL 0
|
||||
#define BRW_MATH_PRECISION_PARTIAL 1
|
||||
|
||||
#define BRW_MATH_SATURATE_NONE 0
|
||||
#define BRW_MATH_SATURATE_SATURATE 1
|
||||
|
||||
#define BRW_MATH_DATA_VECTOR 0
|
||||
#define BRW_MATH_DATA_SCALAR 1
|
||||
|
||||
#define BRW_URB_OPCODE_WRITE 0
|
||||
|
||||
#define BRW_URB_SWIZZLE_NONE 0
|
||||
#define BRW_URB_SWIZZLE_INTERLEAVE 1
|
||||
#define BRW_URB_SWIZZLE_TRANSPOSE 2
|
||||
|
||||
#define BRW_SCRATCH_SPACE_SIZE_1K 0
|
||||
#define BRW_SCRATCH_SPACE_SIZE_2K 1
|
||||
#define BRW_SCRATCH_SPACE_SIZE_4K 2
|
||||
#define BRW_SCRATCH_SPACE_SIZE_8K 3
|
||||
#define BRW_SCRATCH_SPACE_SIZE_16K 4
|
||||
#define BRW_SCRATCH_SPACE_SIZE_32K 5
|
||||
#define BRW_SCRATCH_SPACE_SIZE_64K 6
|
||||
#define BRW_SCRATCH_SPACE_SIZE_128K 7
|
||||
#define BRW_SCRATCH_SPACE_SIZE_256K 8
|
||||
#define BRW_SCRATCH_SPACE_SIZE_512K 9
|
||||
#define BRW_SCRATCH_SPACE_SIZE_1M 10
|
||||
#define BRW_SCRATCH_SPACE_SIZE_2M 11
|
||||
|
||||
|
||||
|
||||
|
||||
#define CMD_URB_FENCE 0x6000
|
||||
#define CMD_CONST_BUFFER_STATE 0x6001
|
||||
#define CMD_CONST_BUFFER 0x6002
|
||||
|
||||
#define CMD_STATE_BASE_ADDRESS 0x6101
|
||||
#define CMD_STATE_INSN_POINTER 0x6102
|
||||
#define CMD_PIPELINE_SELECT 0x6104
|
||||
|
||||
#define CMD_PIPELINED_STATE_POINTERS 0x7800
|
||||
#define CMD_BINDING_TABLE_PTRS 0x7801
|
||||
#define CMD_VERTEX_BUFFER 0x7808
|
||||
#define CMD_VERTEX_ELEMENT 0x7809
|
||||
#define CMD_INDEX_BUFFER 0x780a
|
||||
#define CMD_VF_STATISTICS 0x780b
|
||||
|
||||
#define CMD_DRAW_RECT 0x7900
|
||||
#define CMD_BLEND_CONSTANT_COLOR 0x7901
|
||||
#define CMD_CHROMA_KEY 0x7904
|
||||
#define CMD_DEPTH_BUFFER 0x7905
|
||||
#define CMD_POLY_STIPPLE_OFFSET 0x7906
|
||||
#define CMD_POLY_STIPPLE_PATTERN 0x7907
|
||||
#define CMD_LINE_STIPPLE_PATTERN 0x7908
|
||||
#define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908
|
||||
|
||||
#define CMD_PIPE_CONTROL 0x7a00
|
||||
|
||||
#define CMD_3D_PRIM 0x7b00
|
||||
|
||||
#define CMD_MI_FLUSH 0x0200
|
||||
|
||||
|
||||
/* Various values from the R0 vertex header:
|
||||
*/
|
||||
#define R02_PRIM_END 0x1
|
||||
#define R02_PRIM_START 0x2
|
||||
|
||||
|
||||
|
||||
#endif
|
1327
assembler/brw_structs.h
Normal file
1327
assembler/brw_structs.h
Normal file
File diff suppressed because it is too large
Load Diff
56
assembler/gen4asm.h
Normal file
56
assembler/gen4asm.h
Normal file
@ -0,0 +1,56 @@
|
||||
/* -*- c-basic-offset: 8 -*- */
|
||||
/*
|
||||
* Copyright © 2006 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
*
|
||||
*/
|
||||
|
||||
typedef unsigned char GLubyte;
|
||||
typedef short GLshort;
|
||||
typedef unsigned int GLuint;
|
||||
typedef int GLint;
|
||||
typedef float GLfloat;
|
||||
|
||||
#include "brw_structs.h"
|
||||
|
||||
void yyerror (char *msg);
|
||||
|
||||
/**
|
||||
* This structure is just the list container for instructions accumulated by
|
||||
* the parser.
|
||||
*/
|
||||
struct brw_program_instruction {
|
||||
struct brw_instruction instruction;
|
||||
struct brw_program_instruction *next;
|
||||
};
|
||||
|
||||
/**
|
||||
* This structure is a list of instructions. It is the final output of the
|
||||
* parser.
|
||||
*/
|
||||
struct brw_program {
|
||||
struct brw_program_instruction *first;
|
||||
};
|
||||
|
||||
extern struct brw_program compiled_program;
|
909
assembler/gram.c
Normal file
909
assembler/gram.c
Normal file
@ -0,0 +1,909 @@
|
||||
#include <stdlib.h>
|
||||
#ifndef lint
|
||||
#ifdef __unused
|
||||
__unused
|
||||
#endif
|
||||
static char const
|
||||
yyrcsid[] = "$FreeBSD: src/usr.bin/yacc/skeleton.c,v 1.37 2003/02/12 18:03:55 davidc Exp $";
|
||||
#endif
|
||||
#define YYBYACC 1
|
||||
#define YYMAJOR 1
|
||||
#define YYMINOR 9
|
||||
#define YYLEX yylex()
|
||||
#define YYEMPTY -1
|
||||
#define yyclearin (yychar=(YYEMPTY))
|
||||
#define yyerrok (yyerrflag=0)
|
||||
#define YYRECOVERING() (yyerrflag!=0)
|
||||
#if defined(__cplusplus) || __STDC__
|
||||
static int yygrowstack(void);
|
||||
#else
|
||||
static int yygrowstack();
|
||||
#endif
|
||||
#define YYPREFIX "yy"
|
||||
#line 2 "gram.y"
|
||||
/*
|
||||
* Copyright © 2006 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include "gen4asm.h"
|
||||
#include "brw_defines.h"
|
||||
|
||||
#line 37 "gram.y"
|
||||
typedef union {
|
||||
char *s;
|
||||
int integer;
|
||||
double number;
|
||||
struct brw_instruction instruction;
|
||||
struct brw_program program;
|
||||
struct region {
|
||||
int vert_stride, width, horiz_stride;
|
||||
} region;
|
||||
struct direct_gen_reg {
|
||||
int reg_file, reg_nr, subreg_nr;
|
||||
} direct_gen_reg;
|
||||
double imm32;
|
||||
} YYSTYPE;
|
||||
#line 71 "y.tab.c"
|
||||
#define YYERRCODE 256
|
||||
#define SEMICOLON 257
|
||||
#define LPAREN 258
|
||||
#define RPAREN 259
|
||||
#define LANGLE 260
|
||||
#define RANGLE 261
|
||||
#define LCURLY 262
|
||||
#define RCURLY 263
|
||||
#define COMMA 264
|
||||
#define DOT 265
|
||||
#define TYPE_UD 266
|
||||
#define TYPE_D 267
|
||||
#define TYPE_UW 268
|
||||
#define TYPE_W 269
|
||||
#define TYPE_UB 270
|
||||
#define TYPE_B 271
|
||||
#define TYPE_VF 272
|
||||
#define TYPE_HF 273
|
||||
#define TYPE_V 274
|
||||
#define TYPE_F 275
|
||||
#define ALIGN1 276
|
||||
#define GENREGFILE 277
|
||||
#define MSGREGFILE 278
|
||||
#define MOV 279
|
||||
#define MUL 280
|
||||
#define MAC 281
|
||||
#define MACH 282
|
||||
#define LINE 283
|
||||
#define SAD2 284
|
||||
#define SADA2 285
|
||||
#define DP4 286
|
||||
#define DPH 287
|
||||
#define DP3 288
|
||||
#define DP2 289
|
||||
#define ADD 290
|
||||
#define SEND 291
|
||||
#define NULL_TOKEN 292
|
||||
#define MATH 293
|
||||
#define SAMPLER 294
|
||||
#define GATEWAY 295
|
||||
#define READ 296
|
||||
#define WRITE 297
|
||||
#define URB 298
|
||||
#define THREAD_SPAWNER 299
|
||||
#define MSGLEN 300
|
||||
#define RETURNLEN 301
|
||||
#define INTEGER 302
|
||||
#define NUMBER 303
|
||||
#define accreg 304
|
||||
#define triop 305
|
||||
const short yylhs[] = { -1,
|
||||
0, 16, 16, 16, 1, 1, 1, 1, 2, 17,
|
||||
3, 18, 4, 19, 5, 6, 34, 35, 26, 26,
|
||||
26, 26, 26, 26, 26, 26, 32, 7, 8, 9,
|
||||
9, 15, 15, 14, 13, 13, 10, 11, 12, 28,
|
||||
24, 24, 29, 25, 23, 27, 20, 20, 20, 20,
|
||||
20, 20, 20, 21, 30, 30, 31, 22, 33, 36,
|
||||
};
|
||||
const short yylen[] = { 2,
|
||||
1, 3, 2, 3, 1, 1, 1, 1, 6, 1,
|
||||
7, 1, 7, 1, 1, 12, 1, 1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 3, 3, 1,
|
||||
1, 1, 2, 1, 1, 2, 1, 1, 3, 3,
|
||||
2, 0, 3, 1, 3, 7, 1, 1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 0, 3, 3, 1,
|
||||
};
|
||||
const short yydefred[] = { 0,
|
||||
0, 0, 0, 5, 6, 7, 8, 15, 1, 0,
|
||||
0, 0, 10, 12, 14, 0, 0, 0, 0, 4,
|
||||
2, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
27, 0, 30, 31, 0, 0, 0, 17, 0, 58,
|
||||
0, 0, 0, 0, 55, 56, 34, 37, 32, 0,
|
||||
0, 0, 0, 38, 0, 18, 0, 0, 40, 44,
|
||||
43, 0, 48, 49, 50, 51, 52, 53, 47, 28,
|
||||
0, 9, 0, 0, 54, 33, 35, 0, 0, 0,
|
||||
19, 21, 20, 22, 23, 24, 25, 26, 0, 41,
|
||||
45, 60, 0, 0, 39, 11, 36, 13, 0, 59,
|
||||
0, 0, 0, 0, 0, 0, 0, 16, 46,
|
||||
};
|
||||
const short yydgoto[] = { 2,
|
||||
3, 4, 5, 6, 7, 8, 31, 0, 32, 47,
|
||||
53, 48, 78, 49, 50, 9, 17, 18, 19, 75,
|
||||
76, 24, 44, 59, 61, 89, 74, 51, 34, 79,
|
||||
10, 35, 72, 39, 57, 93,
|
||||
};
|
||||
const short yysindex[] = { -246,
|
||||
-251, 0, -239, 0, 0, 0, 0, 0, 0, -271,
|
||||
-246, -246, 0, 0, 0, -280, -232, -232, -232, 0,
|
||||
0, -232, -273, -261, -261, -261, -261, -219, -245, -244,
|
||||
0, -204, 0, 0, -275, -218, -218, 0, -218, 0,
|
||||
-205, -205, -241, -234, 0, 0, 0, 0, 0, -200,
|
||||
-197, -234, -275, 0, -275, 0, -250, -238, 0, 0,
|
||||
0, -196, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
-210, 0, -235, -234, 0, 0, 0, -200, -234, -200,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, -231, 0,
|
||||
0, 0, -195, -194, 0, 0, 0, 0, -230, 0,
|
||||
-229, -227, -193, -226, -225, -200, -186, 0, 0,
|
||||
};
|
||||
const short yyrindex[] = { -266,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
-266, 1, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
-182, -182, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
};
|
||||
const short yygindex[] = { 0,
|
||||
0, 0, 0, 0, 0, 0, 52, 0, 0, 0,
|
||||
0, -32, 25, 44, 0, 27, 0, 0, 0, -44,
|
||||
3, -7, 0, 41, 0, 0, 0, 26, 0, 49,
|
||||
0, 29, -75, 0, 0, 0,
|
||||
};
|
||||
#define YYTABLESIZE 292
|
||||
const short yytable[] = { 70,
|
||||
3, 29, 96, 54, 98, 11, 56, 13, 14, 1,
|
||||
25, 26, 57, 57, 27, 29, 30, 12, 15, 16,
|
||||
77, 22, 77, 57, 57, 23, 45, 46, 28, 95,
|
||||
108, 63, 64, 65, 66, 67, 68, 20, 21, 40,
|
||||
69, 81, 82, 83, 84, 85, 86, 87, 88, 33,
|
||||
33, 33, 33, 36, 37, 43, 41, 42, 29, 58,
|
||||
62, 71, 73, 90, 91, 92, 94, 100, 99, 101,
|
||||
105, 102, 103, 104, 109, 106, 107, 42, 38, 80,
|
||||
55, 97, 60, 52, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 57,
|
||||
57, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
57, 57,
|
||||
};
|
||||
const short yycheck[] = { 44,
|
||||
0, 277, 78, 36, 80, 257, 39, 279, 280, 256,
|
||||
18, 19, 279, 280, 22, 277, 278, 257, 290, 291,
|
||||
53, 302, 55, 290, 291, 258, 302, 303, 302, 74,
|
||||
106, 266, 267, 268, 269, 270, 271, 11, 12, 259,
|
||||
275, 292, 293, 294, 295, 296, 297, 298, 299, 24,
|
||||
25, 26, 27, 25, 26, 260, 302, 302, 277, 265,
|
||||
302, 262, 260, 302, 261, 276, 302, 263, 300, 264,
|
||||
264, 302, 302, 301, 261, 302, 302, 260, 27, 55,
|
||||
37, 79, 42, 35, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1, -1, 279,
|
||||
280, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
290, 291,
|
||||
};
|
||||
#define YYFINAL 2
|
||||
#ifndef YYDEBUG
|
||||
#define YYDEBUG 0
|
||||
#endif
|
||||
#define YYMAXTOKEN 305
|
||||
#if YYDEBUG
|
||||
const char * const yyname[] = {
|
||||
"end-of-file",0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,"SEMICOLON","LPAREN","RPAREN",
|
||||
"LANGLE","RANGLE","LCURLY","RCURLY","COMMA","DOT","TYPE_UD","TYPE_D","TYPE_UW",
|
||||
"TYPE_W","TYPE_UB","TYPE_B","TYPE_VF","TYPE_HF","TYPE_V","TYPE_F","ALIGN1",
|
||||
"GENREGFILE","MSGREGFILE","MOV","MUL","MAC","MACH","LINE","SAD2","SADA2","DP4",
|
||||
"DPH","DP3","DP2","ADD","SEND","NULL_TOKEN","MATH","SAMPLER","GATEWAY","READ",
|
||||
"WRITE","URB","THREAD_SPAWNER","MSGLEN","RETURNLEN","INTEGER","NUMBER","accreg",
|
||||
"triop",
|
||||
};
|
||||
const char * const yyrule[] = {
|
||||
"$accept : ROOT",
|
||||
"ROOT : instrseq",
|
||||
"instrseq : instruction SEMICOLON instrseq",
|
||||
"instrseq : instruction SEMICOLON",
|
||||
"instrseq : error SEMICOLON instrseq",
|
||||
"instruction : unaryinstruction",
|
||||
"instruction : binaryinstruction",
|
||||
"instruction : binaryaccinstruction",
|
||||
"instruction : triinstruction",
|
||||
"unaryinstruction : predicate unaryop execsize dst srcaccimm instoptions",
|
||||
"unaryop : MOV",
|
||||
"binaryinstruction : predicate binaryop execsize dst src srcimm instoptions",
|
||||
"binaryop : MUL",
|
||||
"binaryaccinstruction : predicate binaryaccop execsize dst srcacc srcimm instoptions",
|
||||
"binaryaccop : ADD",
|
||||
"triinstruction : sendinstruction",
|
||||
"sendinstruction : predicate SEND INTEGER execsize postdst curdst msgtarget MSGLEN INTEGER RETURNLEN INTEGER instoptions",
|
||||
"postdst : dstoperand",
|
||||
"curdst : directsrcoperand",
|
||||
"msgtarget : NULL_TOKEN",
|
||||
"msgtarget : SAMPLER",
|
||||
"msgtarget : MATH",
|
||||
"msgtarget : GATEWAY",
|
||||
"msgtarget : READ",
|
||||
"msgtarget : WRITE",
|
||||
"msgtarget : URB",
|
||||
"msgtarget : THREAD_SPAWNER",
|
||||
"dst : dstoperand",
|
||||
"dstoperand : dstreg dstregion regtype",
|
||||
"dstoperandex : accreg dstregion regtype",
|
||||
"dstreg : directgenreg",
|
||||
"dstreg : directmsgreg",
|
||||
"srcaccimm : srcacc",
|
||||
"srcaccimm : imm32 srcimmtype",
|
||||
"srcacc : directsrcaccoperand",
|
||||
"srcimm : directsrcoperand",
|
||||
"srcimm : imm32 srcimmtype",
|
||||
"directsrcaccoperand : directsrcoperand",
|
||||
"src : directsrcoperand",
|
||||
"directsrcoperand : directgenreg region regtype",
|
||||
"directgenreg : GENREGFILE INTEGER gensubregnum",
|
||||
"gensubregnum : DOT INTEGER",
|
||||
"gensubregnum :",
|
||||
"directmsgreg : MSGREGFILE INTEGER msgsubregnum",
|
||||
"msgsubregnum : gensubregnum",
|
||||
"dstregion : LANGLE INTEGER RANGLE",
|
||||
"region : LANGLE INTEGER COMMA INTEGER COMMA INTEGER RANGLE",
|
||||
"regtype : TYPE_F",
|
||||
"regtype : TYPE_UD",
|
||||
"regtype : TYPE_D",
|
||||
"regtype : TYPE_UW",
|
||||
"regtype : TYPE_W",
|
||||
"regtype : TYPE_UB",
|
||||
"regtype : TYPE_B",
|
||||
"srcimmtype : regtype",
|
||||
"imm32 : INTEGER",
|
||||
"imm32 : NUMBER",
|
||||
"predicate :",
|
||||
"execsize : LPAREN INTEGER RPAREN",
|
||||
"instoptions : LCURLY instoption RCURLY",
|
||||
"instoption : ALIGN1",
|
||||
};
|
||||
#endif
|
||||
#if YYDEBUG
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
#ifdef YYSTACKSIZE
|
||||
#undef YYMAXDEPTH
|
||||
#define YYMAXDEPTH YYSTACKSIZE
|
||||
#else
|
||||
#ifdef YYMAXDEPTH
|
||||
#define YYSTACKSIZE YYMAXDEPTH
|
||||
#else
|
||||
#define YYSTACKSIZE 10000
|
||||
#define YYMAXDEPTH 10000
|
||||
#endif
|
||||
#endif
|
||||
#define YYINITSTACKSIZE 200
|
||||
int yydebug;
|
||||
int yynerrs;
|
||||
int yyerrflag;
|
||||
int yychar;
|
||||
short *yyssp;
|
||||
YYSTYPE *yyvsp;
|
||||
YYSTYPE yyval;
|
||||
YYSTYPE yylval;
|
||||
short *yyss;
|
||||
short *yysslim;
|
||||
YYSTYPE *yyvs;
|
||||
int yystacksize;
|
||||
#line 395 "gram.y"
|
||||
extern int yylineno;
|
||||
|
||||
void yyerror (char *msg)
|
||||
{
|
||||
fprintf(stderr, "parse error \"%s\" at line %d, token \"%s\"\n",
|
||||
msg, yylineno, lex_text());
|
||||
}
|
||||
|
||||
#line 375 "y.tab.c"
|
||||
/* allocate initial stack or double stack size, up to YYMAXDEPTH */
|
||||
static int yygrowstack()
|
||||
{
|
||||
int newsize, i;
|
||||
short *newss;
|
||||
YYSTYPE *newvs;
|
||||
|
||||
if ((newsize = yystacksize) == 0)
|
||||
newsize = YYINITSTACKSIZE;
|
||||
else if (newsize >= YYMAXDEPTH)
|
||||
return -1;
|
||||
else if ((newsize *= 2) > YYMAXDEPTH)
|
||||
newsize = YYMAXDEPTH;
|
||||
i = yyssp - yyss;
|
||||
newss = yyss ? (short *)realloc(yyss, newsize * sizeof *newss) :
|
||||
(short *)malloc(newsize * sizeof *newss);
|
||||
if (newss == NULL)
|
||||
return -1;
|
||||
yyss = newss;
|
||||
yyssp = newss + i;
|
||||
newvs = yyvs ? (YYSTYPE *)realloc(yyvs, newsize * sizeof *newvs) :
|
||||
(YYSTYPE *)malloc(newsize * sizeof *newvs);
|
||||
if (newvs == NULL)
|
||||
return -1;
|
||||
yyvs = newvs;
|
||||
yyvsp = newvs + i;
|
||||
yystacksize = newsize;
|
||||
yysslim = yyss + newsize - 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define YYABORT goto yyabort
|
||||
#define YYREJECT goto yyabort
|
||||
#define YYACCEPT goto yyaccept
|
||||
#define YYERROR goto yyerrlab
|
||||
|
||||
#ifndef YYPARSE_PARAM
|
||||
#if defined(__cplusplus) || __STDC__
|
||||
#define YYPARSE_PARAM_ARG void
|
||||
#define YYPARSE_PARAM_DECL
|
||||
#else /* ! ANSI-C/C++ */
|
||||
#define YYPARSE_PARAM_ARG
|
||||
#define YYPARSE_PARAM_DECL
|
||||
#endif /* ANSI-C/C++ */
|
||||
#else /* YYPARSE_PARAM */
|
||||
#ifndef YYPARSE_PARAM_TYPE
|
||||
#define YYPARSE_PARAM_TYPE void *
|
||||
#endif
|
||||
#if defined(__cplusplus) || __STDC__
|
||||
#define YYPARSE_PARAM_ARG YYPARSE_PARAM_TYPE YYPARSE_PARAM
|
||||
#define YYPARSE_PARAM_DECL
|
||||
#else /* ! ANSI-C/C++ */
|
||||
#define YYPARSE_PARAM_ARG YYPARSE_PARAM
|
||||
#define YYPARSE_PARAM_DECL YYPARSE_PARAM_TYPE YYPARSE_PARAM;
|
||||
#endif /* ANSI-C/C++ */
|
||||
#endif /* ! YYPARSE_PARAM */
|
||||
|
||||
int
|
||||
yyparse (YYPARSE_PARAM_ARG)
|
||||
YYPARSE_PARAM_DECL
|
||||
{
|
||||
int yym, yyn, yystate;
|
||||
#if YYDEBUG
|
||||
const char *yys;
|
||||
|
||||
if ((yys = getenv("YYDEBUG")))
|
||||
{
|
||||
yyn = *yys;
|
||||
if (yyn >= '0' && yyn <= '9')
|
||||
yydebug = yyn - '0';
|
||||
}
|
||||
#endif
|
||||
|
||||
yynerrs = 0;
|
||||
yyerrflag = 0;
|
||||
yychar = (-1);
|
||||
|
||||
if (yyss == NULL && yygrowstack()) goto yyoverflow;
|
||||
yyssp = yyss;
|
||||
yyvsp = yyvs;
|
||||
*yyssp = yystate = 0;
|
||||
|
||||
yyloop:
|
||||
if ((yyn = yydefred[yystate])) goto yyreduce;
|
||||
if (yychar < 0)
|
||||
{
|
||||
if ((yychar = yylex()) < 0) yychar = 0;
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
{
|
||||
yys = 0;
|
||||
if (yychar <= YYMAXTOKEN) yys = yyname[yychar];
|
||||
if (!yys) yys = "illegal-symbol";
|
||||
printf("%sdebug: state %d, reading %d (%s)\n",
|
||||
YYPREFIX, yystate, yychar, yys);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
if ((yyn = yysindex[yystate]) && (yyn += yychar) >= 0 &&
|
||||
yyn <= YYTABLESIZE && yycheck[yyn] == yychar)
|
||||
{
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: state %d, shifting to state %d\n",
|
||||
YYPREFIX, yystate, yytable[yyn]);
|
||||
#endif
|
||||
if (yyssp >= yysslim && yygrowstack())
|
||||
{
|
||||
goto yyoverflow;
|
||||
}
|
||||
*++yyssp = yystate = yytable[yyn];
|
||||
*++yyvsp = yylval;
|
||||
yychar = (-1);
|
||||
if (yyerrflag > 0) --yyerrflag;
|
||||
goto yyloop;
|
||||
}
|
||||
if ((yyn = yyrindex[yystate]) && (yyn += yychar) >= 0 &&
|
||||
yyn <= YYTABLESIZE && yycheck[yyn] == yychar)
|
||||
{
|
||||
yyn = yytable[yyn];
|
||||
goto yyreduce;
|
||||
}
|
||||
if (yyerrflag) goto yyinrecovery;
|
||||
#if defined(lint) || defined(__GNUC__)
|
||||
goto yynewerror;
|
||||
#endif
|
||||
yynewerror:
|
||||
yyerror("syntax error");
|
||||
#if defined(lint) || defined(__GNUC__)
|
||||
goto yyerrlab;
|
||||
#endif
|
||||
yyerrlab:
|
||||
++yynerrs;
|
||||
yyinrecovery:
|
||||
if (yyerrflag < 3)
|
||||
{
|
||||
yyerrflag = 3;
|
||||
for (;;)
|
||||
{
|
||||
if ((yyn = yysindex[*yyssp]) && (yyn += YYERRCODE) >= 0 &&
|
||||
yyn <= YYTABLESIZE && yycheck[yyn] == YYERRCODE)
|
||||
{
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: state %d, error recovery shifting\
|
||||
to state %d\n", YYPREFIX, *yyssp, yytable[yyn]);
|
||||
#endif
|
||||
if (yyssp >= yysslim && yygrowstack())
|
||||
{
|
||||
goto yyoverflow;
|
||||
}
|
||||
*++yyssp = yystate = yytable[yyn];
|
||||
*++yyvsp = yylval;
|
||||
goto yyloop;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: error recovery discarding state %d\n",
|
||||
YYPREFIX, *yyssp);
|
||||
#endif
|
||||
if (yyssp <= yyss) goto yyabort;
|
||||
--yyssp;
|
||||
--yyvsp;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (yychar == 0) goto yyabort;
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
{
|
||||
yys = 0;
|
||||
if (yychar <= YYMAXTOKEN) yys = yyname[yychar];
|
||||
if (!yys) yys = "illegal-symbol";
|
||||
printf("%sdebug: state %d, error recovery discards token %d (%s)\n",
|
||||
YYPREFIX, yystate, yychar, yys);
|
||||
}
|
||||
#endif
|
||||
yychar = (-1);
|
||||
goto yyloop;
|
||||
}
|
||||
yyreduce:
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: state %d, reducing by rule %d (%s)\n",
|
||||
YYPREFIX, yystate, yyn, yyrule[yyn]);
|
||||
#endif
|
||||
yym = yylen[yyn];
|
||||
yyval = yyvsp[1-yym];
|
||||
switch (yyn)
|
||||
{
|
||||
case 1:
|
||||
#line 92 "gram.y"
|
||||
{
|
||||
compiled_program = yyvsp[0].program;
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
#line 98 "gram.y"
|
||||
{
|
||||
struct brw_program_instruction *list_entry =
|
||||
calloc(sizeof(struct brw_program_instruction), 1);
|
||||
list_entry->instruction = yyvsp[-2].instruction;
|
||||
|
||||
list_entry->next = yyvsp[0].program.first;
|
||||
yyvsp[0].program.first = list_entry;
|
||||
|
||||
yyval.program = yyvsp[0].program;
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
#line 109 "gram.y"
|
||||
{
|
||||
struct brw_program_instruction *list_entry =
|
||||
calloc(sizeof(struct brw_program_instruction), 1);
|
||||
list_entry->instruction = yyvsp[-1].instruction;
|
||||
|
||||
list_entry->next = NULL;
|
||||
|
||||
yyval.program.first = list_entry;
|
||||
}
|
||||
break;
|
||||
case 4:
|
||||
#line 119 "gram.y"
|
||||
{
|
||||
yyval.program = yyvsp[0].program;
|
||||
}
|
||||
break;
|
||||
case 9:
|
||||
#line 132 "gram.y"
|
||||
{
|
||||
yyval.instruction.header.opcode = yyvsp[-4].integer;
|
||||
yyval.instruction.header.execution_size = yyvsp[-3].integer;
|
||||
}
|
||||
break;
|
||||
case 10:
|
||||
#line 138 "gram.y"
|
||||
{ yyval.integer = BRW_OPCODE_MOV; }
|
||||
break;
|
||||
case 11:
|
||||
#line 143 "gram.y"
|
||||
{
|
||||
yyval.instruction.header.opcode = yyvsp[-5].integer;
|
||||
yyval.instruction.header.execution_size = yyvsp[-4].integer;
|
||||
}
|
||||
break;
|
||||
case 12:
|
||||
#line 149 "gram.y"
|
||||
{ yyval.integer = BRW_OPCODE_MUL; }
|
||||
break;
|
||||
case 13:
|
||||
#line 153 "gram.y"
|
||||
{
|
||||
yyval.instruction.header.opcode = yyvsp[-5].integer;
|
||||
yyval.instruction.header.execution_size = yyvsp[-4].integer;
|
||||
}
|
||||
break;
|
||||
case 14:
|
||||
#line 159 "gram.y"
|
||||
{ yyval.integer = BRW_OPCODE_ADD; }
|
||||
break;
|
||||
case 16:
|
||||
#line 167 "gram.y"
|
||||
{
|
||||
yyval.instruction.header.opcode = BRW_OPCODE_SEND;
|
||||
yyval.instruction.header.execution_size = yyvsp[-8].integer;
|
||||
yyval.instruction.header.destreg__conditonalmod = yyvsp[-9].integer;
|
||||
}
|
||||
break;
|
||||
case 19:
|
||||
#line 181 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_NULL; }
|
||||
break;
|
||||
case 20:
|
||||
#line 182 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_SAMPLER; }
|
||||
break;
|
||||
case 21:
|
||||
#line 183 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_MATH; }
|
||||
break;
|
||||
case 22:
|
||||
#line 184 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_GATEWAY; }
|
||||
break;
|
||||
case 23:
|
||||
#line 185 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_DATAPORT_READ; }
|
||||
break;
|
||||
case 24:
|
||||
#line 186 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_DATAPORT_WRITE; }
|
||||
break;
|
||||
case 25:
|
||||
#line 187 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_URB; }
|
||||
break;
|
||||
case 26:
|
||||
#line 188 "gram.y"
|
||||
{ yyval.integer = BRW_MESSAGE_TARGET_THREAD_SPAWNER; }
|
||||
break;
|
||||
case 28:
|
||||
#line 198 "gram.y"
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* filled in.
|
||||
*/
|
||||
yyval.instruction.bits1 = yyvsp[-2].instruction.bits1;
|
||||
yyval.instruction.bits1.da1.dest_reg_type = yyvsp[-1].integer;
|
||||
}
|
||||
break;
|
||||
case 29:
|
||||
#line 207 "gram.y"
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* filled in.
|
||||
*/
|
||||
yyval.instruction.bits1 = yyvsp[-2].instruction.bits1;
|
||||
yyval.instruction.bits1.da1.dest_reg_type = yyvsp[-1].integer;
|
||||
}
|
||||
break;
|
||||
case 30:
|
||||
#line 217 "gram.y"
|
||||
{
|
||||
yyval.instruction.bits1.da1.dest_reg_file = yyvsp[0].direct_gen_reg.reg_file;
|
||||
yyval.instruction.bits1.da1.dest_reg_nr = yyvsp[0].direct_gen_reg.reg_nr;
|
||||
yyval.instruction.bits1.da1.dest_subreg_nr = yyvsp[0].direct_gen_reg.subreg_nr;
|
||||
}
|
||||
break;
|
||||
case 33:
|
||||
#line 229 "gram.y"
|
||||
{
|
||||
yyval.instruction.bits1.da1.src0_reg_file = BRW_IMMEDIATE_VALUE;
|
||||
switch (yyvsp[0].integer) {
|
||||
case BRW_REGISTER_TYPE_UD:
|
||||
yyval.instruction.bits3.ud = yyvsp[-1].imm32;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_D:
|
||||
yyval.instruction.bits3.id = yyvsp[-1].imm32;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_F:
|
||||
yyval.instruction.bits3.fd = yyvsp[-1].imm32;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 36:
|
||||
#line 251 "gram.y"
|
||||
{
|
||||
yyval.instruction.bits1.da1.src0_reg_file = BRW_IMMEDIATE_VALUE;
|
||||
switch (yyvsp[0].integer) {
|
||||
case BRW_REGISTER_TYPE_UD:
|
||||
yyval.instruction.bits3.ud = yyvsp[-1].imm32;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_D:
|
||||
yyval.instruction.bits3.id = yyvsp[-1].imm32;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_F:
|
||||
yyval.instruction.bits3.fd = yyvsp[-1].imm32;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 39:
|
||||
#line 277 "gram.y"
|
||||
{
|
||||
/* Returns a source operand in the src0 fields of an
|
||||
* instruction.
|
||||
*/
|
||||
yyval.instruction.bits1.da1.src0_reg_file = yyvsp[-2].direct_gen_reg.reg_file;
|
||||
yyval.instruction.bits1.da1.src0_reg_type = yyvsp[0].integer;
|
||||
yyval.instruction.bits2.da1.src0_subreg_nr = yyvsp[-2].direct_gen_reg.subreg_nr;
|
||||
yyval.instruction.bits2.da1.src0_reg_nr = yyvsp[-2].direct_gen_reg.reg_nr;
|
||||
yyval.instruction.bits2.da1.src0_vert_stride = yyvsp[-1].region.vert_stride;
|
||||
yyval.instruction.bits2.da1.src0_width = yyvsp[-1].region.width;
|
||||
yyval.instruction.bits2.da1.src0_horiz_stride = yyvsp[-1].region.horiz_stride;
|
||||
}
|
||||
break;
|
||||
case 40:
|
||||
#line 293 "gram.y"
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* fields filled in.
|
||||
*/
|
||||
yyval.direct_gen_reg.reg_file = BRW_GENERAL_REGISTER_FILE;
|
||||
yyval.direct_gen_reg.reg_nr = yyvsp[-1].integer;
|
||||
yyval.direct_gen_reg.subreg_nr = yyvsp[0].integer;
|
||||
}
|
||||
break;
|
||||
case 41:
|
||||
#line 303 "gram.y"
|
||||
{
|
||||
yyval.integer = yyvsp[0].integer;
|
||||
}
|
||||
break;
|
||||
case 42:
|
||||
#line 307 "gram.y"
|
||||
{
|
||||
/* Default to subreg 0 if unspecified. */
|
||||
yyval.integer = 0;
|
||||
}
|
||||
break;
|
||||
case 43:
|
||||
#line 314 "gram.y"
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* fields filled in.
|
||||
*/
|
||||
yyval.direct_gen_reg.reg_file = BRW_GENERAL_REGISTER_FILE;
|
||||
yyval.direct_gen_reg.reg_nr = yyvsp[-1].integer;
|
||||
yyval.direct_gen_reg.subreg_nr = yyvsp[0].integer;
|
||||
}
|
||||
break;
|
||||
case 45:
|
||||
#line 329 "gram.y"
|
||||
{
|
||||
/* Returns a value for a horiz_stride field of an
|
||||
* instruction.
|
||||
*/
|
||||
if (yyvsp[-1].integer != 1 && yyvsp[-1].integer != 2 && yyvsp[-1].integer != 4) {
|
||||
fprintf(stderr, "Invalid horiz size %d\n", yyvsp[-1].integer);
|
||||
}
|
||||
yyval.integer = ffs(yyvsp[-1].integer);
|
||||
}
|
||||
break;
|
||||
case 46:
|
||||
#line 341 "gram.y"
|
||||
{
|
||||
yyval.region.vert_stride = yyvsp[-5].integer;
|
||||
yyval.region.width = yyvsp[-3].integer;
|
||||
yyval.region.horiz_stride = yyvsp[-1].integer;
|
||||
}
|
||||
break;
|
||||
case 47:
|
||||
#line 353 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_F; }
|
||||
break;
|
||||
case 48:
|
||||
#line 354 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_UD; }
|
||||
break;
|
||||
case 49:
|
||||
#line 355 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_D; }
|
||||
break;
|
||||
case 50:
|
||||
#line 356 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_UW; }
|
||||
break;
|
||||
case 51:
|
||||
#line 357 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_UW; }
|
||||
break;
|
||||
case 52:
|
||||
#line 358 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_UB; }
|
||||
break;
|
||||
case 53:
|
||||
#line 359 "gram.y"
|
||||
{ yyval.integer = BRW_REGISTER_TYPE_B; }
|
||||
break;
|
||||
case 58:
|
||||
#line 372 "gram.y"
|
||||
{
|
||||
/* Returns a value for the execution_size field of an
|
||||
* instruction.
|
||||
*/
|
||||
if (yyvsp[-1].integer != 1 && yyvsp[-1].integer != 2 && yyvsp[-1].integer != 4 && yyvsp[-1].integer != 8 && yyvsp[-1].integer != 16 &&
|
||||
yyvsp[-1].integer != 32) {
|
||||
fprintf(stderr, "Invalid execution size %d\n", yyvsp[-1].integer);
|
||||
YYERROR;
|
||||
}
|
||||
yyval.integer = ffs(yyvsp[-1].integer);
|
||||
}
|
||||
break;
|
||||
#line 854 "y.tab.c"
|
||||
}
|
||||
yyssp -= yym;
|
||||
yystate = *yyssp;
|
||||
yyvsp -= yym;
|
||||
yym = yylhs[yyn];
|
||||
if (yystate == 0 && yym == 0)
|
||||
{
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: after reduction, shifting from state 0 to\
|
||||
state %d\n", YYPREFIX, YYFINAL);
|
||||
#endif
|
||||
yystate = YYFINAL;
|
||||
*++yyssp = YYFINAL;
|
||||
*++yyvsp = yyval;
|
||||
if (yychar < 0)
|
||||
{
|
||||
if ((yychar = yylex()) < 0) yychar = 0;
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
{
|
||||
yys = 0;
|
||||
if (yychar <= YYMAXTOKEN) yys = yyname[yychar];
|
||||
if (!yys) yys = "illegal-symbol";
|
||||
printf("%sdebug: state %d, reading %d (%s)\n",
|
||||
YYPREFIX, YYFINAL, yychar, yys);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
if (yychar == 0) goto yyaccept;
|
||||
goto yyloop;
|
||||
}
|
||||
if ((yyn = yygindex[yym]) && (yyn += yystate) >= 0 &&
|
||||
yyn <= YYTABLESIZE && yycheck[yyn] == yystate)
|
||||
yystate = yytable[yyn];
|
||||
else
|
||||
yystate = yydgoto[yym];
|
||||
#if YYDEBUG
|
||||
if (yydebug)
|
||||
printf("%sdebug: after reduction, shifting from state %d \
|
||||
to state %d\n", YYPREFIX, *yyssp, yystate);
|
||||
#endif
|
||||
if (yyssp >= yysslim && yygrowstack())
|
||||
{
|
||||
goto yyoverflow;
|
||||
}
|
||||
*++yyssp = yystate;
|
||||
*++yyvsp = yyval;
|
||||
goto yyloop;
|
||||
yyoverflow:
|
||||
yyerror("yacc stack overflow");
|
||||
yyabort:
|
||||
return (1);
|
||||
yyaccept:
|
||||
return (0);
|
||||
}
|
402
assembler/gram.y
Normal file
402
assembler/gram.y
Normal file
@ -0,0 +1,402 @@
|
||||
%{
|
||||
/*
|
||||
* Copyright © 2006 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include "gen4asm.h"
|
||||
#include "brw_defines.h"
|
||||
|
||||
%}
|
||||
|
||||
%start ROOT
|
||||
|
||||
%union {
|
||||
char *s;
|
||||
int integer;
|
||||
double number;
|
||||
struct brw_instruction instruction;
|
||||
struct brw_program program;
|
||||
struct region {
|
||||
int vert_stride, width, horiz_stride;
|
||||
} region;
|
||||
struct direct_gen_reg {
|
||||
int reg_file, reg_nr, subreg_nr;
|
||||
} direct_gen_reg;
|
||||
double imm32;
|
||||
}
|
||||
|
||||
%token SEMICOLON
|
||||
%token LPAREN RPAREN
|
||||
%token LANGLE RANGLE
|
||||
%token LCURLY RCURLY
|
||||
%token COMMA
|
||||
%token DOT
|
||||
|
||||
%token TYPE_UD, TYPE_D, TYPE_UW, TYPE_W, TYPE_UB, TYPE_B,
|
||||
%token TYPE_VF, TYPE_HF, TYPE_V, TYPE_F
|
||||
|
||||
%token ALIGN1
|
||||
|
||||
%token GENREGFILE MSGREGFILE
|
||||
|
||||
%token MOV
|
||||
%token MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2
|
||||
%token ADD
|
||||
%token SEND NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER
|
||||
|
||||
%token MSGLEN RETURNLEN
|
||||
|
||||
%token <integer> INTEGER
|
||||
%token <number> NUMBER
|
||||
|
||||
%type <instruction> instruction unaryinstruction binaryinstruction
|
||||
%type <instruction> binaryaccinstruction triinstruction sendinstruction
|
||||
%type <instruction> dstoperand dstoperandex dstreg accreg
|
||||
%type <instruction> directsrcaccoperand src directsrcoperand srcimm
|
||||
%type <instruction> srcacc srcaccimm
|
||||
%type <program> instrseq
|
||||
%type <integer> unaryop binaryop binaryaccop triop
|
||||
%type <integer> regtype srcimmtype execsize dstregion
|
||||
%type <integer> gensubregnum msgsubregnum msgtarget
|
||||
%type <region> region
|
||||
%type <direct_gen_reg> directgenreg directmsgreg
|
||||
%type <imm32> imm32
|
||||
|
||||
%%
|
||||
|
||||
ROOT: instrseq
|
||||
{
|
||||
compiled_program = $1;
|
||||
}
|
||||
;
|
||||
|
||||
instrseq: instruction SEMICOLON instrseq
|
||||
{
|
||||
struct brw_program_instruction *list_entry =
|
||||
calloc(sizeof(struct brw_program_instruction), 1);
|
||||
list_entry->instruction = $1;
|
||||
|
||||
list_entry->next = $3.first;
|
||||
$3.first = list_entry;
|
||||
|
||||
$$ = $3;
|
||||
}
|
||||
| instruction SEMICOLON
|
||||
{
|
||||
struct brw_program_instruction *list_entry =
|
||||
calloc(sizeof(struct brw_program_instruction), 1);
|
||||
list_entry->instruction = $1;
|
||||
|
||||
list_entry->next = NULL;
|
||||
|
||||
$$.first = list_entry;
|
||||
}
|
||||
| error SEMICOLON instrseq
|
||||
{
|
||||
$$ = $3;
|
||||
}
|
||||
;
|
||||
|
||||
/* 1.4.1: Instruction groups */
|
||||
instruction: unaryinstruction
|
||||
| binaryinstruction
|
||||
| binaryaccinstruction
|
||||
| triinstruction
|
||||
;
|
||||
|
||||
unaryinstruction: predicate unaryop execsize dst srcaccimm instoptions
|
||||
{
|
||||
$$.header.opcode = $2;
|
||||
$$.header.execution_size = $3;
|
||||
}
|
||||
;
|
||||
|
||||
unaryop: MOV { $$ = BRW_OPCODE_MOV; }
|
||||
;
|
||||
|
||||
binaryinstruction:
|
||||
predicate binaryop execsize dst src srcimm instoptions
|
||||
{
|
||||
$$.header.opcode = $2;
|
||||
$$.header.execution_size = $3;
|
||||
}
|
||||
;
|
||||
|
||||
binaryop: MUL { $$ = BRW_OPCODE_MUL; }
|
||||
|
||||
binaryaccinstruction:
|
||||
predicate binaryaccop execsize dst srcacc srcimm instoptions
|
||||
{
|
||||
$$.header.opcode = $2;
|
||||
$$.header.execution_size = $3;
|
||||
}
|
||||
;
|
||||
|
||||
binaryaccop: ADD { $$ = BRW_OPCODE_ADD; }
|
||||
;
|
||||
|
||||
triinstruction: sendinstruction
|
||||
|
||||
/* XXX formatting of this instruction */
|
||||
sendinstruction: predicate SEND INTEGER execsize postdst curdst msgtarget
|
||||
MSGLEN INTEGER RETURNLEN INTEGER instoptions
|
||||
{
|
||||
$$.header.opcode = BRW_OPCODE_SEND;
|
||||
$$.header.execution_size = $4;
|
||||
$$.header.destreg__conditonalmod = $3;
|
||||
}
|
||||
|
||||
/* XXX! */
|
||||
postdst: dstoperand
|
||||
;
|
||||
|
||||
/* XXX! */
|
||||
curdst: directsrcoperand
|
||||
;
|
||||
|
||||
msgtarget: NULL_TOKEN { $$ = BRW_MESSAGE_TARGET_NULL; }
|
||||
| SAMPLER { $$ = BRW_MESSAGE_TARGET_SAMPLER; }
|
||||
| MATH { $$ = BRW_MESSAGE_TARGET_MATH; }
|
||||
| GATEWAY { $$ = BRW_MESSAGE_TARGET_GATEWAY; }
|
||||
| READ { $$ = BRW_MESSAGE_TARGET_DATAPORT_READ; }
|
||||
| WRITE { $$ = BRW_MESSAGE_TARGET_DATAPORT_WRITE; }
|
||||
| URB { $$ = BRW_MESSAGE_TARGET_URB; }
|
||||
| THREAD_SPAWNER { $$ = BRW_MESSAGE_TARGET_THREAD_SPAWNER; }
|
||||
;
|
||||
|
||||
/* 1.4.2: Destination register */
|
||||
|
||||
/** XXX: dstoperandex */
|
||||
dst: dstoperand
|
||||
|
||||
/* XXX: dstregion writemask */
|
||||
dstoperand: dstreg dstregion regtype
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* filled in.
|
||||
*/
|
||||
$$.bits1 = $1.bits1;
|
||||
$$.bits1.da1.dest_reg_type = $2;
|
||||
}
|
||||
|
||||
dstoperandex: accreg dstregion regtype
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* filled in.
|
||||
*/
|
||||
$$.bits1 = $1.bits1;
|
||||
$$.bits1.da1.dest_reg_type = $2;
|
||||
}
|
||||
|
||||
/* XXX: indirectgenreg, directmsgreg, indirectmsgreg */
|
||||
dstreg: directgenreg
|
||||
{
|
||||
$$.bits1.da1.dest_reg_file = $1.reg_file;
|
||||
$$.bits1.da1.dest_reg_nr = $1.reg_nr;
|
||||
$$.bits1.da1.dest_subreg_nr = $1.subreg_nr;
|
||||
}
|
||||
| directmsgreg
|
||||
|
||||
;
|
||||
|
||||
/* 1.4.3: Source register */
|
||||
srcaccimm: srcacc
|
||||
| imm32 srcimmtype
|
||||
{
|
||||
$$.bits1.da1.src0_reg_file = BRW_IMMEDIATE_VALUE;
|
||||
switch ($2) {
|
||||
case BRW_REGISTER_TYPE_UD:
|
||||
$$.bits3.ud = $1;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_D:
|
||||
$$.bits3.id = $1;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_F:
|
||||
$$.bits3.fd = $1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
;
|
||||
|
||||
/* XXX: indirectsrcaccoperand */
|
||||
srcacc: directsrcaccoperand
|
||||
;
|
||||
|
||||
srcimm: directsrcoperand
|
||||
| imm32 srcimmtype
|
||||
{
|
||||
$$.bits1.da1.src0_reg_file = BRW_IMMEDIATE_VALUE;
|
||||
switch ($2) {
|
||||
case BRW_REGISTER_TYPE_UD:
|
||||
$$.bits3.ud = $1;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_D:
|
||||
$$.bits3.id = $1;
|
||||
break;
|
||||
case BRW_REGISTER_TYPE_F:
|
||||
$$.bits3.fd = $1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
;
|
||||
|
||||
/* XXX: srcaccoperandex, accreg regtype */
|
||||
directsrcaccoperand: directsrcoperand
|
||||
;
|
||||
|
||||
/* XXX: indirectsrcoperand */
|
||||
src: directsrcoperand
|
||||
;
|
||||
|
||||
/* XXX: srcmodifier, swizzle srcaccoperandex */
|
||||
directsrcoperand: directgenreg region regtype
|
||||
{
|
||||
/* Returns a source operand in the src0 fields of an
|
||||
* instruction.
|
||||
*/
|
||||
$$.bits1.da1.src0_reg_file = $1.reg_file;
|
||||
$$.bits1.da1.src0_reg_type = $3;
|
||||
$$.bits2.da1.src0_subreg_nr = $1.subreg_nr;
|
||||
$$.bits2.da1.src0_reg_nr = $1.reg_nr;
|
||||
$$.bits2.da1.src0_vert_stride = $2.vert_stride;
|
||||
$$.bits2.da1.src0_width = $2.width;
|
||||
$$.bits2.da1.src0_horiz_stride = $2.horiz_stride;
|
||||
}
|
||||
;
|
||||
|
||||
/* 1.4.5: Register files and register numbers */
|
||||
directgenreg: GENREGFILE INTEGER gensubregnum
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* fields filled in.
|
||||
*/
|
||||
$$.reg_file = BRW_GENERAL_REGISTER_FILE;
|
||||
$$.reg_nr = $2;
|
||||
$$.subreg_nr = $3;
|
||||
}
|
||||
|
||||
gensubregnum: DOT INTEGER
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
|
|
||||
{
|
||||
/* Default to subreg 0 if unspecified. */
|
||||
$$ = 0;
|
||||
}
|
||||
;
|
||||
|
||||
directmsgreg: MSGREGFILE INTEGER msgsubregnum
|
||||
{
|
||||
/* Returns an instruction with just the destination register
|
||||
* fields filled in.
|
||||
*/
|
||||
$$.reg_file = BRW_GENERAL_REGISTER_FILE;
|
||||
$$.reg_nr = $2;
|
||||
$$.subreg_nr = $3;
|
||||
}
|
||||
;
|
||||
|
||||
msgsubregnum: gensubregnum
|
||||
;
|
||||
|
||||
/* 1.4.7: Regions */
|
||||
dstregion: LANGLE INTEGER RANGLE
|
||||
{
|
||||
/* Returns a value for a horiz_stride field of an
|
||||
* instruction.
|
||||
*/
|
||||
if ($2 != 1 && $2 != 2 && $2 != 4) {
|
||||
fprintf(stderr, "Invalid horiz size %d\n", $2);
|
||||
}
|
||||
$$ = ffs($2);
|
||||
}
|
||||
;
|
||||
|
||||
region: LANGLE INTEGER COMMA INTEGER COMMA INTEGER RANGLE
|
||||
{
|
||||
$$.vert_stride = $2;
|
||||
$$.width = $4;
|
||||
$$.horiz_stride = $6;
|
||||
}
|
||||
;
|
||||
|
||||
/* 1.4.8: Types */
|
||||
|
||||
/* regtype returns an integer register type suitable for inserting into an
|
||||
* instruction.
|
||||
*/
|
||||
regtype: TYPE_F { $$ = BRW_REGISTER_TYPE_F; }
|
||||
| TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; }
|
||||
| TYPE_D { $$ = BRW_REGISTER_TYPE_D; }
|
||||
| TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; }
|
||||
| TYPE_W { $$ = BRW_REGISTER_TYPE_UW; }
|
||||
| TYPE_UB { $$ = BRW_REGISTER_TYPE_UB; }
|
||||
| TYPE_B { $$ = BRW_REGISTER_TYPE_B; }
|
||||
/* XXX: Add TYPE_VF and TYPE_HF */
|
||||
srcimmtype: regtype
|
||||
;
|
||||
|
||||
/* 1.4.11: */
|
||||
imm32: INTEGER | NUMBER
|
||||
|
||||
/* 1.4.12: Predication and modifiers */
|
||||
/* XXX: do the predicate */
|
||||
predicate:
|
||||
|
||||
execsize: LPAREN INTEGER RPAREN
|
||||
{
|
||||
/* Returns a value for the execution_size field of an
|
||||
* instruction.
|
||||
*/
|
||||
if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 &&
|
||||
$2 != 32) {
|
||||
fprintf(stderr, "Invalid execution size %d\n", $2);
|
||||
YYERROR;
|
||||
}
|
||||
$$ = ffs($2);
|
||||
}
|
||||
;
|
||||
|
||||
/* 1.4.13: Instruction options */
|
||||
/* XXX: this is a comma-separated list, really. */
|
||||
instoptions: LCURLY instoption RCURLY
|
||||
|
||||
/* XXX: fill me in. alignctrl, comprctrl, threadctrl, depctrl, maskctrl,
|
||||
* debugctrl, sendctrl
|
||||
*/
|
||||
instoption: ALIGN1
|
||||
|
||||
%%
|
||||
extern int yylineno;
|
||||
|
||||
void yyerror (char *msg)
|
||||
{
|
||||
fprintf(stderr, "parse error \"%s\" at line %d, token \"%s\"\n",
|
||||
msg, yylineno, lex_text());
|
||||
}
|
||||
|
1886
assembler/lex.c
Normal file
1886
assembler/lex.c
Normal file
File diff suppressed because it is too large
Load Diff
94
assembler/lex.l
Normal file
94
assembler/lex.l
Normal file
@ -0,0 +1,94 @@
|
||||
%option yylineno
|
||||
%{
|
||||
#include "gen4asm.h"
|
||||
#include "y.tab.h"
|
||||
%}
|
||||
%start IN_REG
|
||||
|
||||
%%
|
||||
\/\/.*[\r\n] { } /* eat up single-line comments */
|
||||
|
||||
"mov" { return MOV; }
|
||||
|
||||
"mul" { return MUL; }
|
||||
"mac" { return MAC; }
|
||||
"mach" { return MACH; }
|
||||
"line" { return LINE; }
|
||||
"sad2" { return SAD2; }
|
||||
"sada2" { return SADA2; }
|
||||
"dp4" { return DP4; }
|
||||
"dph" { return DPH; }
|
||||
"dp3" { return DP3; }
|
||||
"dp2" { return DP2; }
|
||||
|
||||
"add" { return ADD; }
|
||||
|
||||
"send" { return SEND; }
|
||||
"mlen" { return MSGLEN; }
|
||||
"rlen" { return RETURNLEN; }
|
||||
"null" { return NULL_TOKEN; }
|
||||
"math" { return MATH; }
|
||||
"sampler" { return SAMPLER; }
|
||||
"gateway" { return GATEWAY; }
|
||||
"read" { return READ; }
|
||||
"write" { return WRITE; }
|
||||
"urb" { return URB; }
|
||||
"thread_spawner" { return THREAD_SPAWNER; }
|
||||
|
||||
";" { return SEMICOLON; }
|
||||
"(" { return LPAREN; }
|
||||
")" { return RPAREN; }
|
||||
"<" { return LANGLE; }
|
||||
">" { return RANGLE; }
|
||||
"{" { return LCURLY; }
|
||||
"}" { return RCURLY; }
|
||||
"," { return COMMA; }
|
||||
"." { return DOT; }
|
||||
|
||||
/* XXX: this lexing of register files is shady */
|
||||
"m" { BEGIN(IN_REG); return MSGREGFILE; }
|
||||
[gr] { BEGIN(IN_REG); return GENREGFILE; }
|
||||
|
||||
/*
|
||||
* Lexing of register types should probably require the ":" symbol specified
|
||||
* in the BNF of the assembly, but our existing source didn't use that syntax.
|
||||
*/
|
||||
"UD" { BEGIN(INITIAL); return TYPE_UD; }
|
||||
"D" { BEGIN(INITIAL); return TYPE_D; }
|
||||
"UW" { BEGIN(INITIAL); return TYPE_UW; }
|
||||
"W" { BEGIN(INITIAL); return TYPE_W; }
|
||||
"UB" { BEGIN(INITIAL); return TYPE_UB; }
|
||||
"B" { BEGIN(INITIAL); return TYPE_B; }
|
||||
"F" { BEGIN(INITIAL); return TYPE_F; }
|
||||
|
||||
"align1" { return ALIGN1; }
|
||||
|
||||
[0-9]* {
|
||||
yylval.integer = atoi(yytext);
|
||||
return INTEGER;
|
||||
}
|
||||
|
||||
<INITIAL>[-]?[0-9]+"."[0-9]+ {
|
||||
yylval.number = strtod(yytext, NULL);
|
||||
return NUMBER;
|
||||
}
|
||||
|
||||
[ \t\n]+ { } /* eat up whitespace */
|
||||
|
||||
. {
|
||||
printf("parse error at line %d: unexpected \"%s\"\n",
|
||||
yylineno, yytext);
|
||||
exit(1);
|
||||
}
|
||||
%%
|
||||
|
||||
char *
|
||||
lex_text(void)
|
||||
{
|
||||
return yytext;
|
||||
}
|
||||
|
||||
#ifndef yywrap
|
||||
yywrap() { return 1; }
|
||||
#endif
|
||||
|
55
assembler/main.c
Normal file
55
assembler/main.c
Normal file
@ -0,0 +1,55 @@
|
||||
/* -*- c-basic-offset: 8 -*- */
|
||||
/*
|
||||
* Copyright © 2006 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "gen4asm.h"
|
||||
|
||||
extern FILE *yyin;
|
||||
|
||||
struct brw_program compiled_program;
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int err;
|
||||
struct brw_program_instruction *entry;
|
||||
|
||||
err = yyparse();
|
||||
|
||||
for (entry = compiled_program.first;
|
||||
entry != NULL;
|
||||
entry = entry->next) {
|
||||
printf(" {0x%08x, 0x%08x, 0x%08x },\n",
|
||||
((int *)(&entry->instruction))[0],
|
||||
((int *)(&entry->instruction))[1],
|
||||
((int *)(&entry->instruction))[2]);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
82
assembler/packed_yuv_wm.g4a
Normal file
82
assembler/packed_yuv_wm.g4a
Normal file
@ -0,0 +1,82 @@
|
||||
mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
|
||||
mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
|
||||
add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
|
||||
mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
|
||||
add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
|
||||
mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
|
||||
add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
|
||||
mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
|
||||
add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
add (8) g4<1>F g4<8,8,1>F g1<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F g1<0,1,0>F { align1 };
|
||||
mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 };
|
||||
mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 };
|
||||
add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
add (8) g6<1>F g6<8,8,1>F g1.4<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F g1.4<0,1,0>F { align1 };
|
||||
mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
mov (8) m1<1>F g4<8,8,1>F { align1 };
|
||||
mov (8) m2<1>F g5<8,8,1>F { align1 };
|
||||
mov (8) m3<1>F g6<8,8,1>F { align1 };
|
||||
mov (8) m4<1>F g7<8,8,1>F { align1 };
|
||||
send 0 (16) g12<1>UW g0<8,8,1>UW sampler mlen 5 rlen 8 { align1 };
|
||||
mov (8) g19<1>UW g19<8,8,1>UW { align1 };
|
||||
add (8) g14<1>F g14<8,8,1>F -0.0627451F { align1 };
|
||||
add (8) g12<1>F g12<8,8,1>F -0.501961F { align1 };
|
||||
add (8) g16<1>F g16<8,8,1>F -0.501961F { align1 };
|
||||
mul (8) g14<1>F g14<8,8,1>F 1.164F { align1 };
|
||||
mul (8) a0<1>F g12<8,8,1>F 1.596F { align1 };
|
||||
mac (8) m2<1>F g14<8,8,1>F 1F { align1Saturate };
|
||||
mul (8) a0<1>F g12<8,8,1>F -0.813F { align1 };
|
||||
mac (8) a0<1>F g16<8,8,1>F -0.392F { align1 };
|
||||
mac (8) m3<1>F g14<8,8,1>F 1F { align1Saturate };
|
||||
mul (8) a0<1>F g16<8,8,1>F 2.017F { align1 };
|
||||
mac (8) m4<1>F g14<8,8,1>F 1F { align1Saturate };
|
||||
add (8) g15<1>F g15<8,8,1>F -0.0627451F { align1 };
|
||||
add (8) g13<1>F g13<8,8,1>F -0.501961F { align1 };
|
||||
add (8) g17<1>F g17<8,8,1>F -0.501961F { align1 };
|
||||
mul (8) g15<1>F g15<8,8,1>F 1.164F { align1 };
|
||||
mul (8) a0<1>F g13<8,8,1>F 1.596F { align1 };
|
||||
mac (8) m6<1>F g15<8,8,1>F 1F { align1Saturate };
|
||||
mul (8) a0<1>F g13<8,8,1>F -0.813F { align1 };
|
||||
mac (8) a0<1>F g17<8,8,1>F -0.392F { align1 };
|
||||
mac (8) m7<1>F g15<8,8,1>F 1F { align1Saturate };
|
||||
mul (8) a0<1>F g17<8,8,1>F 2.017F { align1 };
|
||||
mac (8) m8<1>F g15<8,8,1>F 1F { align1Saturate };
|
||||
mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
|
||||
send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
||||
nop (4) g0<1>UD { align1 };
|
Loading…
x
Reference in New Issue
Block a user