flywithu/ntel-gpu-tools
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4 Commits

Author SHA1 Message Date
Eric Anholt
2dac0a19a4 Add support for destination writemasks. 
This involved changing dest operands to have their own structure like src
operands, as the destination writemask (which is align16-only) shares space
with register numbers in align1 mode.
 2013-03-04 15:54:23 +00:00
Eric Anholt
6a88ada7e8 Add support for swizzle control on source operands. 
This required restructuring to store source operands in a new structure rather
than being stored in instructions, as swizzle is align16-only and shares
storage with other fields for align1 mode.

These changes were not tested on real programs using swizzle.
 2013-03-04 15:54:22 +00:00
Eric Anholt
f2f18561e5 C warnings cleanup. 2013-03-04 15:54:20 +00:00
Eric Anholt
22a1063cc0 Initial gen4asm code. 2013-03-04 15:54:20 +00:00