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Author SHA1 Message Date
Chris Wilson
91b1c62a9c gem_linear_blits: Minor enhancements 
Include a simple series of blits that exhaust the aperture but have the
maximum grace time between reuse.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-06 10:10:52 +00:00
Chris Wilson
f343805d16 Simplify gem_linear_blits 
By doing everything manually we can indeed exercise the full GTT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-02 10:39:05 +00:00
Chris Wilson
9fd7e35c39 Simple test to ensure that working sets larger than memory, just work. 
Based on gem_tiled_blit, but without the complication of the tiling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 19:24:41 +00:00
Chris Wilson
68a95f0e38 error decode: Search for first i915_error_state 
Handy for multi-GPU systems where the IGFX may not be first.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 13:37:56 +00:00
Chris Wilson
3c5c8ba71c Search for the first Intel dri device. 
This is vital in a multi-GPU system so that we only test the Intel card
and not the discrete GPUs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 13:37:04 +00:00
Chris Wilson
c1e9795050 tests/gem_tiled_fence_blits: Ensure the bo count is odd 
In order to avoid a self-copy, the number of bo must not be even.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 11:13:36 +00:00
Chris Wilson
371f87f2d8 Exercise the whole aperture with tiled blits 
After full-gtt, gem_tiled_blits doesn't allocate enough to force
eviction. So query the total aperture and accommodate.

Also introduce a similar test that utilizes fences rather than
use the BLT to perform the tiling and detiling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-02-01 10:56:46 +00:00
Chris Wilson
5fc09c82d4 Time blt vs pwrite 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-29 16:13:38 +00:00
Chris Wilson
07d59b308d Add a simple test to execute n nop batches 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-29 16:13:38 +00:00
Chris Wilson
ed385ea331 Add a GTT timing test 
Using for basic benchmarking and diagnosing some mysterious slowdowns.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-29 16:13:38 +00:00
Chris Wilson
281285ec70 bios: Parse SDVO panel DTDs 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-29 16:13:38 +00:00
Chris Wilson
afaf5ef27c gpu-top: Correct computation of ring size 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-09 14:48:03 +00:00
Chris Wilson
98eb5a5e24 error: Parse ring name before gtt_offset 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-09 13:27:22 +00:00
Chris Wilson
d9ec63b1a0 intel_gpu_top: Include BLT ring 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-07 19:59:00 +00:00
Chris Wilson
5503ac9e19 intel_gpu_top: Wake the GT power well to read gen6 ring registers 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2011-01-07 19:58:55 +00:00
Chris Wilson
4f20844247 error decode: print out class of chipset in the error report 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-23 19:44:14 +00:00
Chris Wilson
f19a1942c2 Add a GTT timing test 
Using for diagnosing some mysterious slowdowns. Should include a variant
for basic benchmarking...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-23 12:47:17 +00:00
Jesse Barnes
322563027c tools/bios_reader: try to dump more child device data 
Some of our device class defines were incorrect, and we were missing
several recent ones, so fix those up and dump more child device data if
we have it.
 2010-12-21 12:06:00 -08:00
Jesse Barnes
5406c633a0 tests: add display testing program 
Just a simple program to light up all detected outputs at their native
mode and respond to hotplug events.
 2010-12-21 09:39:07 -08:00
Eric Anholt
253acc34af intel_disable_clock_gating: New tool for turning off clock gating on ILK. 
This is something I sometimes want to do in testing, to see if a
mystery bug (say, 29172) is due to broken clock gating.  Sadly, in
this case it isn't.  Note that it isn't supported on non-ILK chipsets
yet.
 2010-12-16 16:48:29 -08:00
Eric Anholt
19b412b37c intel_gpu_top: Print stats regs on Ironlake as well. 2010-12-16 16:47:03 -08:00
Chris Wilson
292ae4538a error-decode: stdin is 0 not 1 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-10 15:31:59 +00:00
Chris Wilson
94de0b46b5 decode: Add a couple of BLT MI. 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-04 14:12:19 +00:00
Chris Wilson
1e4cf7dbbe gpu-dump: Include BLT and BSD ringbuffers 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-04 11:42:17 +00:00
Chris Wilson
157207ada5 decode: Add some missing protection against short buffers for gen6 instr 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-03 00:41:43 +00:00
Chris Wilson
3dafead3f2 dump-decode: allow specification of devid, i.e. gen 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-02 23:05:16 +00:00
Chris Wilson
a3a78632bd error-decode: Operate as a pipe and accept input from stdin 
Useful for feeding in compressed files from bugzilla:

$ bzcat /tmp/i915_error_state.bz | intel_error_decode | less

Next step would be to use gzfopen or bzfopen to automagically handle
compressed files...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-12-01 21:51:59 +00:00
Chris Wilson
aa0a346deb decode: Improve parsing of i915 fixed-length indexed primitives 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-11-29 16:06:46 +00:00
Chris Wilson
d4d769a432 Prepare for split BLT ring on Sandybridge. 
Depends on libdrm 057fab3382c02af54126ce395c43d4e6dce9439a

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31123
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-10-26 11:46:52 +01:00
Chris Wilson
8934395d9d Decode PGTBL_ER for i965 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-10-22 11:33:08 +01:00
Chris Wilson
8a4fc850a8 intel_gpu_top: Sample BSD rings as well as render 
Show how busy the GPU is when decoding video as well as rendering.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-10-01 22:23:16 +01:00
Zhenyu Wang
4eef00a8fb decode: fix PS sample state change bit on sandybridge 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-09-29 09:47:46 +08:00
Zhenyu Wang
dbc547dbb5 intel_decode: decode 3d commands for sandybridge 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-09-27 13:35:49 +08:00
Zhenyu Wang
b95893820f Add all sandybridge device ids 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2010-09-27 13:35:36 +08:00
Jesse Barnes
7ab19ae6fe intel_reg_dumper: eDP port is on the CPU, not PCH 
Made me think there was another register until I checked the offset.
 2010-09-20 14:37:07 -07:00
Adam Jackson
4f12d8acba bios_reader: Fix to work on non-Intel machines 
Actually, fix to work on _any_ machine where the ROM file doesn't match
the GPU.  Just extract the device ID from the ROM itself rather than
look at the running system.

Signed-off-by: Adam Jackson <ajax@redhat.com>
 2010-09-08 14:39:12 -04:00
Chris Wilson
c09fa38c01 reg dumper: Dump ILK panel fitting control debug registers 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-09-05 12:05:52 +01:00
Chris Wilson
a462fa6e29 reg dumper: Fix ilk panel fitter filter shift 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-09-05 10:53:12 +01:00
Chris Wilson
c935c60214 tests: Fix fallout from s/EBADF/ENOENT/ in 2.6.36 
After bf79cb914dbfe848add8bb76cbb8ff89110d29ff, drm uses ENOENT to
report unknown handles buffer objects, update the tests accordingly.

Fixes:

  Bug 29794 - some intel_gpu_tools cases fail
  https://bugs.freedesktop.org/show_bug.cgi?id=29794

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-08-25 12:00:05 +01:00
Chris Wilson
14618620cc decode: Handle errors during parsing. 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-08-25 12:00:05 +01:00
Chris Wilson
db91f220da reg dumper: Add panel backlight detailed information 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-08-25 12:00:05 +01:00
Eric Anholt
74c8c8d612 intel_gpu_top: Fix the "limit printing to terminal height" again. 2010-07-19 08:28:10 -07:00
Eric Anholt
9e4ba53014 intel_decode: Fix decode for gen6's moved VERTEX_ELEMENTS valid bit. 2010-07-19 08:28:10 -07:00
Chris Wilson
aa4772c3c1 dump decode: Add a non-installed program for decoding binary batchbuffer dumps. 
Rather than add yet another decoder into the drivers, I rather just emit
a binary blob and use the decoder being developed here.

As it is a pure debugging feature, lets not package it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-07-15 19:33:00 +01:00
Chris Wilson
2d1ad95423 error: Decode i915 PGTBL errors 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-07-15 19:33:00 +01:00
Eric Anholt
cf255e382d intel_decode: Fix whitespace for importing to Mesa. 2010-07-08 12:13:08 -07:00
Jesse Barnes
b1e839d026 intel_reg_dumper: add some 945 MI reg dumping 2010-06-30 02:02:49 -07:00
Adam Jackson
be6e1a53fc Use longer string padding in intel_reg_dumper on ironlake 
DIGITAL_PORT_HOTPLUG_CNTRL is 26 chars.  Bump out to 30.

Signed-off-by: Adam Jackson <ajax@redhat.com>
 2010-06-30 11:18:00 -04:00
Adam Jackson
439adf7a0a fix reg_dumper on systems without intel gpus 2010-06-30 10:58:32 -04:00
Chris Wilson
040fbc6ea3 intel_reg_dump: Off-by-one in calculation of i965 fence pitch 
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 2010-06-15 13:05:48 +01:00