mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-18 21:36:27 +00:00
Simplify gem_linear_blits
By doing everything manually we can indeed exercise the full GTT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
parent
9fd7e35c39
commit
f343805d16
@ -49,9 +49,32 @@
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static int width = 512, height = 512;
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#define WIDTH 512
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#define HEIGHT 512
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static uint32_t linear[WIDTH*HEIGHT];
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static uint32_t gem_create(int fd, int size)
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{
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struct drm_i915_gem_create create;
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create.handle = 0;
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create.size = size;
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(void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
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assert(create.handle);
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return create.handle;
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}
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static void gem_close(int fd, uint32_t handle)
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{
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struct drm_gem_close close;
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int ret;
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close.handle = handle;
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ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
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assert(ret == 0);
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}
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static uint64_t
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gem_aperture_size(int fd)
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@ -63,50 +86,159 @@ gem_aperture_size(int fd)
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return aperture.aper_size;
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}
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static drm_intel_bo *
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create_bo(uint32_t start_val)
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static void
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gem_write(int fd, uint32_t handle, int offset, int size, const void *buf)
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{
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drm_intel_bo *bo;
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uint32_t *linear;
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int i;
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struct drm_i915_gem_pwrite pwrite;
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int ret;
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bo = drm_intel_bo_alloc(bufmgr, "linear bo", 1024 * 1024, 4096);
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/* Fill the BO with dwords starting at start_val */
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drm_intel_bo_map(bo, 1);
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linear = bo->virtual;
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for (i = 0; i < 1024 * 1024 / 4; i++)
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linear[i] = start_val++;
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drm_intel_bo_unmap(bo);
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return bo;
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pwrite.handle = handle;
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pwrite.offset = offset;
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pwrite.size = size;
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pwrite.data_ptr = (uintptr_t)buf;
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ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite);
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assert(ret == 0);
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}
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static void
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check_bo(drm_intel_bo *bo, uint32_t start_val)
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gem_read(int fd, uint32_t handle, int offset, int size, void *buf)
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{
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uint32_t *linear;
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struct drm_i915_gem_pread pread;
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int ret;
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pread.handle = handle;
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pread.offset = offset;
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pread.size = size;
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pread.data_ptr = (uintptr_t)buf;
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ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PREAD, &pread);
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assert(ret == 0);
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}
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static void
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copy(int fd, uint32_t dst, uint32_t src)
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{
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uint32_t batch[10];
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struct drm_i915_gem_relocation_entry reloc[2];
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struct drm_i915_gem_exec_object2 obj[3];
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struct drm_i915_gem_execbuffer2 exec;
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uint32_t handle;
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int ret;
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batch[0] = XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB;
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batch[1] = (3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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WIDTH*4;
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batch[2] = 0; /* dst x1,y1 */
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batch[3] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
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batch[4] = 0; /* dst reloc */
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batch[5] = 0; /* src x1,y1 */
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batch[6] = WIDTH*4;
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batch[7] = 0; /* src reloc */
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batch[8] = MI_BATCH_BUFFER_END;
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batch[9] = MI_NOOP;
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handle = gem_create(fd, 4096);
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gem_write(fd, handle, 0, sizeof(batch), batch);
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reloc[0].target_handle = dst;
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reloc[0].delta = 0;
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reloc[0].offset = 4 * sizeof(batch[0]);
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reloc[0].presumed_offset = 0;
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reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;;
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reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
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reloc[1].target_handle = src;
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reloc[1].delta = 0;
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reloc[1].offset = 7 * sizeof(batch[0]);
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reloc[1].presumed_offset = 0;
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reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;;
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reloc[1].write_domain = 0;
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obj[0].handle = dst;
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obj[0].relocation_count = 0;
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obj[0].relocs_ptr = 0;
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obj[0].alignment = 0;
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obj[0].offset = 0;
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obj[0].flags = 0;
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obj[0].rsvd1 = 0;
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obj[0].rsvd2 = 0;
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obj[1].handle = src;
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obj[1].relocation_count = 0;
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obj[1].relocs_ptr = 0;
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obj[1].alignment = 0;
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obj[1].offset = 0;
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obj[1].flags = 0;
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obj[1].rsvd1 = 0;
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obj[1].rsvd2 = 0;
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obj[2].handle = handle;
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obj[2].relocation_count = 2;
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obj[2].relocs_ptr = (uintptr_t)reloc;
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obj[2].alignment = 0;
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obj[2].offset = 0;
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obj[2].flags = 0;
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obj[2].rsvd1 = obj[2].rsvd2 = 0;
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exec.buffers_ptr = (uintptr_t)obj;
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exec.buffer_count = 3;
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exec.batch_start_offset = 0;
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exec.batch_len = sizeof(batch);
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exec.DR1 = exec.DR4 = 0;
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exec.num_cliprects = 0;
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exec.cliprects_ptr = 0;
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exec.flags = IS_GEN6(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0;
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exec.rsvd1 = exec.rsvd2 = 0;
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ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
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while (ret && errno == EBUSY) {
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drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
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ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
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}
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assert(ret == 0);
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gem_close(fd, handle);
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}
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static uint32_t
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create_bo(int fd, uint32_t val)
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{
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uint32_t handle;
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int i;
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drm_intel_bo_map(bo, 0);
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linear = bo->virtual;
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handle = gem_create(fd, sizeof(linear));
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for (i = 0; i < 1024 * 1024 / 4; i++) {
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if (linear[i] != start_val) {
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/* Fill the BO with dwords starting at val */
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for (i = 0; i < WIDTH*HEIGHT; i++)
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linear[i] = val++;
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gem_write(fd, handle, 0, sizeof(linear), linear);
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return handle;
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}
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static void
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check_bo(int fd, uint32_t handle, uint32_t val)
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{
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int i;
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gem_read(fd, handle, 0, sizeof(linear), linear);
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for (i = 0; i < WIDTH*HEIGHT; i++) {
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if (linear[i] != val) {
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fprintf(stderr, "Expected 0x%08x, found 0x%08x "
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"at offset 0x%08x\n",
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start_val, linear[i], i * 4);
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val, linear[i], i * 4);
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abort();
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}
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start_val++;
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val++;
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}
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drm_intel_bo_unmap(bo);
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}
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int main(int argc, char **argv)
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{
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drm_intel_bo *bo[4096];
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uint32_t bo_start_val[4096];
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uint32_t handle[4096];
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uint32_t start_val[4096];
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uint32_t start = 0;
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int i, fd, count;
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@ -116,19 +248,9 @@ int main(int argc, char **argv)
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printf("Using %d 1MiB buffers\n", count);
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assert(count <= 4096);
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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for (i = 0; i < count; i++) {
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bo[i] = create_bo(start);
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bo_start_val[i] = start;
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/*
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printf("Creating bo %d\n", i);
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check_bo(bo[i], bo_start_val[i]);
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*/
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handle[i] = create_bo(fd, start);
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start_val[i] = start;
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start += 1024 * 1024 / 4;
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}
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@ -139,29 +261,12 @@ int main(int argc, char **argv)
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if (src == dst)
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continue;
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intel_copy_bo(batch, bo[dst], bo[src], width, height);
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bo_start_val[dst] = bo_start_val[src];
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/*
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check_bo(bo[dst], bo_start_val[dst]);
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printf("%d: copy bo %d to %d\n", i, src, dst);
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*/
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copy(fd, handle[dst], handle[src]);
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start_val[dst] = start_val[src];
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}
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for (i = 0; i < count; i++) {
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/*
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printf("check %d\n", i);
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*/
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check_bo(bo[i], bo_start_val[i]);
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drm_intel_bo_unreference(bo[i]);
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bo[i] = NULL;
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}
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intel_batchbuffer_free(batch);
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drm_intel_bufmgr_destroy(bufmgr);
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close(fd);
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for (i = 0; i < count; i++)
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check_bo(fd, handle[i], start_val[i]);
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return 0;
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}
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