This isn't strictly necessary it would have been easy enough to simply
convert intel_chipset.h but this should be nice prep work for directly
doing MMIO. It also serves as a nice review point.
It's demonstrated with an autodetect function in the script. That
autodetect has a hardcoded path that shouldn't be there, but it will go
away in the next patch when we can properly link in libpciaccess.
Thanks to Matt for helping whip the automake stuff into shape.
v2: Switch to $(top_srcdir)
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This patch includes a patch from Jesse which removed a bunch of VLV
registers which were useless in my original RFC.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This is the base tool for quick dump. At it's heart, quick dump is
simply a basic text parsing thingie which plugs into intel-gpu-tools to
do something similar to intel_reg_dumper.
The format for the register definition files is very open, so it's just
something simple for now.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Vincent sent me a patch which I think didn't go far enough.
Honestly, I don't even know what this tool does.
Reported-by: Cheah, Vincent Beng Keat <vincent.beng.keat.cheah@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
cppcheck reported:
[tools/intel_infoframes.c:836]: (error) Width 31 given in format string
(no. 1) is larger than destination buffer 'option[16]',
use %15s to prevent overflowing it.
Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Those infoframes are programmed when using stereo 3D modes.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Now that we can dump registers giving a partial name, adding more
information about the dumped registers seems useful.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Let people give just a part of the register name. Handy when not
remembering the exact name or if the register is defined with a
different name than the one in the spec being looked at.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
One can now give an address instead of a register name to decode a
single register.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From time to time, one would like to decode a register value that have
been captured at a certain point in time (and say printed out with a
printk). intel_reg_dumper has all the knowledge to do that and this
patch adds a way to ask it to decode a value.
Example usage:
$ ./tools/intel_reg_dumper PCH_PP_CONTROL 0xabcd0002
PCH_PP_CONTROL: 0xabcd0002 (blacklight disabled, power...
v2: friendlier invocation (Chris Wilson)
v3: remove unecessary casts and use strcasecmp (Jani Nikula)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rather than use the common mmio segment which will be in future
restricted to just the registers and so exclude the GTT portion on all
architectures, explicitly mmap the GTT ourselves. Repeat this mmapping
with a couple of flags until we matching the existing kernel mapping.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Solaris <sys/types.h> already has #define NOPID (pid_t)(-1)
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
In Valleyview the DPLL and lane control registers are accessible only
through side band fabric called DPIO. Added two tools to read and write
registers residing in this space.
v2: Moved the core read/write functions to lib/intel_dpio.c based on
Ben's feedback
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
there're three Ports B/C/D used for selection by each transcoder A/B/C.
Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
We need to hold forcewake lock in order to be able to read GT registers.
Otherwise, when the GPU is in RC6 mode, we'll read all zeros.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
We should get more kms tests soon, and not needing to copy-paste a
nice test pattern should be useful.
That establishes a firm depency of i-g-t on cairo over everything, but
I don't care so much about that.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Somehow nobody noticed this before, but we were missing blt and bsd6
initialization on Gen7.
Reported-by: Philippe Lecluse <philippe.lecluse@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
For now, only print their content for diffing, but also add the necessary
bits that can be used for more verbose output in the fugure.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This is a command-line tool that allows us to display and modify the
InfoFrames we send.
v2: use argv instead of stdin
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
