We tweak the tests marked as runnable in simulation to run more quickly,
more often then not at the expense of stress testing (which is of an
arguable interest for the initial bring up in simulation). Hopefully the
values chosen still test something, which is not always straightforward.
It does run quickly, the number on an IVB machines are:
$ time sudo IGT_SIMULATION=0 ./piglit-run.py tests/igt.tests foo
[...]
real 2m0.141s
user 0m16.365s
sys 1m33.382s
Vs.
$ time sudo IGT_SIMULATION=1 ./piglit-run.py tests/igt.tests foo
[...]
real 0m0.448s
user 0m0.226s
sys 0m0.183s
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Let's start by a small set of tests, to eventually consider running
more.
The current list should then be:
gem_mmap
gem_pread_after_blit
gem_ring_sync_loop
gem_ctx_basic
gem_pipe_control_store_loop
gem_storedw_loop_render
gem_storedw_loop_blt
gem_storedw_loop_bsd
gem_render_linear_blits
gem_tiled_blits
gem_cpu_reloc
gem_exec_nop
gem_mmap_gtt
v2 add (Daniel Vetter)
gem_exec_bad_domains
gem_exec_faulting_reloc
gem_flink
gem_reg_read
gem_reloc_overflow
gem_tiling_max_stride
prime_*
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
It's more accurate this way as the quick mode is really useful for in
the simulation environment.
v2: Use the INTEL_ prefix to have a chance to share the same environment
variable as piglit OpenGL tests
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
We've somewhat recently added RGB30 support to testdisplay, but we need
cairo 1.12.0 for that. Barf early.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
We want prime to only ever create one native gem object for each
dma-buf it sees. This can e.g. happen if multiple processes import the
same foreign dma-buf, e.g. the application imports a yuv frame from
v4l to encode it into a video stream and the compositor imports it
into his fd again to display it with an overlay.
Hence add a bunch of tests which check all the various orders in which
this could happen. Currently they all fail.
Checking flink names is the easiest (and afaik only) way to check
whether we're indeed dealing with the same object.
This checks both ways, i.e. exporting from i915 and from nouveau, each
with two variants of the test: One reuses the prime fd, the other
closes it and creates a new one.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
It's purely accidental that importing that same bo to different
drm nouveau fds yields the same handle.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
They simply take forever with the current kernel implementation. And
since everyone switched over to the event based interface I don't see
much incentive to try to fix that.
So just disable them.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The intel_reg_dumper tool reads a lot of display registers. If we
don't turn on the power well, dmesg will get flooded with tons of
messages about unclaimed registers. So here we enable the "Debug"
power well register and then restore its state later. It's impossible
to guarantee that other things won't mess with the debug register
between our put and get calls, but at least we're trying our best to
keep things working fine, and it's the debug register anyway.
As far as I know, nothing else uses the Debug register for anything,
so we should be safe for now.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
In the atexit handler, we attempt to quiesce the GPU. This involves
opening a fd - which will fail if the test is not being run as root and
will obliterate the test status and pollute the output.
We need to be careful in case other devices grow an error file in the
future. The first step here is just to check the minor that corresponds
with the debugfs path found for the device
As /sys/class/drm/cardX/error is a new interface for 3.11, we need to be
quiet when it does not exist or else we upset the automated tests.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66533
Since these two tests exercise a working set larger than aperture, they
require stalls which are prone to being interrupted - so interrupt them
and check that everything still works.
Test both debugfs and sysfs error_state interfaces.
v2: sysfs error_state not mandatory
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: Update sysfs file name.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
In preparation to have sysfs entries used in scripts
rename to more specific name.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Add the names of all VLV DPIO registers.
v2: Use the third element to signal DPIO registers, and split
the code changes to a separate patch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Add a small comment about what the elements in the register
tuple mean.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Repurpose the (currently unused) third element in the register
definition tuple to indicate the type of the register. 'DPIO'
is the only special register type for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Accidentally replaced the intel_copy_bo() with the set_bo() in the
"overwrite-source" in 4fd34977aff60f58cd955eb9c2d568d5fb824611 when
clearly I wanted to simply add the calls to set_bo() first.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Accidentally left in the hack to run the
"overwrite-source-interruptible" for only one loop, used whilst testing.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Hiding the initial set_bo() required for the "overwrite-source" tests
lead to a nice bit of hilarity as I missed repeating the initialisation
for the multiple loops of the interruptible version of
"overwrite-source".
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel preferred to keep the old tests intact lest we accidentally break
them, and to add the new interruptible tests as new subtests.
In the process also make sure the GPU is idle before starting each loop.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In order to exercise the bug behind:
commit 22fd5ca947b58901927d100d2b1aa0f1672b3435
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Fri Jun 28 16:54:08 2013 +0100
drm/i915: Only clear write-domains after a successful wait-seqno
we need to check for concurrent access with the potential to be
interrupted by a signal. The framework for doing so is already in place,
so just enable it and repeat the tests for longer to give better chance
of being interrupted at just the wrong moment.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
