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tests/gem_(cpu|gtt)_concurrent_blit: Enable signals
In order to exercise the bug behind: commit 22fd5ca947b58901927d100d2b1aa0f1672b3435 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Jun 28 16:54:08 2013 +0100 drm/i915: Only clear write-domains after a successful wait-seqno we need to check for concurrent access with the potential to be interrupted by a signal. The framework for doing so is already in place, so just enable it and repeat the tests for longer to give better chance of being interrupted at just the wrong moment. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -54,7 +54,7 @@ set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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int size = width * height;
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uint32_t *vaddr;
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drm_intel_bo_map(bo, true);
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do_or_die(drm_intel_bo_map(bo, true));
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vaddr = bo->virtual;
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while (size--)
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*vaddr++ = val;
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@ -67,7 +67,7 @@ cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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int size = width * height;
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uint32_t *vaddr;
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drm_intel_bo_map(bo, false);
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do_or_die(drm_intel_bo_map(bo, false));
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vaddr = bo->virtual;
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while (size--)
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assert(*vaddr++ == val);
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@ -95,8 +95,7 @@ main(int argc, char **argv)
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int num_buffers = 128, max;
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drm_intel_bo *src[128], *dst[128], *dummy = NULL;
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int width = 512, height = 512;
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int fd;
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int i;
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int i, loop, fd;
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drmtest_subtest_init(argc, argv);
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@ -119,36 +118,44 @@ main(int argc, char **argv)
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}
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/* try to overwrite the source values */
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drmtest_fork_signal_helper();
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if (drmtest_run_subtest("overwrite-source")) {
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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}
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}
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/* try to read the results before the copy completes */
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if (drmtest_run_subtest("early-read")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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}
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/* and finally try to trick the kernel into loosing the pending write */
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if (drmtest_run_subtest("gpu-read-after-write")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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}
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drmtest_fork_signal_helper();
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return 0;
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}
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@ -83,7 +83,7 @@ create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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/* gtt map doesn't have a write parameter, so just keep the mapping
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* around (to avoid the set_domain with the gtt write domain set) and
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* manually tell the kernel when we start access the gtt. */
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drm_intel_gem_bo_map_gtt(bo);
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do_or_die(drm_intel_gem_bo_map_gtt(bo));
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set_bo(bo, val, width, height);
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@ -98,8 +98,7 @@ main(int argc, char **argv)
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int num_buffers = 128, max;
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drm_intel_bo *src[128], *dst[128], *dummy = NULL;
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int width = 512, height = 512;
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int fd;
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int i;
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int fd, loop, i;
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drmtest_subtest_init(argc, argv);
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@ -122,36 +121,44 @@ main(int argc, char **argv)
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}
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/* try to overwrite the source values */
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drmtest_fork_signal_helper();
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if (drmtest_run_subtest("overwrite-source")) {
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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}
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}
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/* try to read the results before the copy completes */
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if (drmtest_run_subtest("early-read")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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}
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/* and finally try to trick the kernel into loosing the pending write */
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if (drmtest_run_subtest("gpu-read-after-write")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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for (loop = 0; loop < 10; loop++) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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}
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drmtest_stop_signal_helper();
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return 0;
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}
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