Supporting two new operators, bfe and bfi2
bfe: Component-wise extracts a bit field from src2 using the bit field width from src0 and the bit field offset from src1.
bfi2: component-wise performs the bitfield insert operation on src1 and src2 based on the mask in src0.
The shift/reduce conflict mentioned in the comment has been fixed, so
flagreg can return the reg number in the lvalue now. In addition, it will
be easy to add support for flag register f1 on Ivy bridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Since Sandybridge, DP supports cache select for read/write. Some write messages such as
OWord Block Write don't support render cache any more on Ivybridge. So introduce a
generic data_port messsage for Sandybridge+.
data_port(
cache_type, /* sampler, render, constant or data(on Ivybridge+) cache */
message_type, /* read or write type */
message_control,
binding_table_index,
write_commit_or_category, /* write commit on Sandybridge, category on Ivybridge+ */
header_present)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Previously some instructions parsed by this assembler don't follow the
documents.
Signed-off-by: Chen, Yangyang <yangyang.chen@intel.com>
Signed-off-by: Han, Haofu <haofu.han@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
