Since Sandybridge, DP supports cache select for read/write. Some write messages such as
OWord Block Write don't support render cache any more on Ivybridge. So introduce a
generic data_port messsage for Sandybridge+.
data_port(
cache_type, /* sampler, render, constant or data(on Ivybridge+) cache */
message_type, /* read or write type */
message_control,
binding_table_index,
write_commit_or_category, /* write commit on Sandybridge, category on Ivybridge+ */
header_present)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Previously some instructions parsed by this assembler don't follow the
documents.
Signed-off-by: Chen, Yangyang <yangyang.chen@intel.com>
Signed-off-by: Han, Haofu <haofu.han@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Send doesn't have implied move on Sandybridge, the SFID moves to bits[24,27] which
is used as the destination of the implied move on Prev GEN6.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
