intel_iosf_sb_{read,write} provide the same functionality.
intel_dpio_{read,write} are still left in place since they use a
ifferent opcode to do the register access. Need to verify if
both opcodes work.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a bunc of symbolic sideband unit names so that you don't have to go
trawling through the sideband HAS every time you want to poke at
something with the tool. You can still specify the port manually though
if you know them by heart already.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Unlike the kernel IS_VALLEYVIEW() doesn't cover chv in igt. Add the
appropriate IS_CHERRYVIEW() checks to the various sideband poking tools.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
v2: a more generic fix to cover current and future platforms (Damien).
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Instead of building batch directly to memory, build into cmd and
state arrays. This representation allows us more flexibility in batch
state expression and batch generation/relocation.
As a bonus, we can also attach the line information that produced the
batch data to help debugging.
There is no change in the output states produced. This can be considered
as a preparatory patch to help introduce gen8 golden state.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Since relocations are variable size, depending upon generation, it is
easier to handle the resizing of the batch request inside the
BEGIN_BATCH macro. This still leaves us with having to resize commands
in a few places - which still need adaption for gen8+.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
version.h is now generated in the libs directory, so make sure it is
correctly included in the compiler flags.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
intel_poller can be used to poll various display registers
(IIR,scanline/pixel/flip/frame counter, live address, etc.).
It can be used to determine eg. at which scanline or pixel count certain
events occur.
v2: s/intel_poller/intel_display_poller/
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add generic tools to poke at IOSF sideband. The user needs to
manually specify SB port as well as the register.
TODO: Maybe add symbolic names for the units? Would avoid having
to trawl the docs for the magic hex value.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Each architecture file contains a list of the text files it requires, so
use this to add to the list of files to distribute.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
The registers in these files are included in the dumps for all platforms
by default, so no need to specify them explicitly.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Also move the phy register block to its logical place.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split out the base offset into the third argument and rename MIPIB to
MIPIC to match the display cluster register HAS.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Very-much-wanted-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Generate valid (null) render state for each gen. Output
it as a c source file with batch and relocations.
v2: noinst and vs_start fixed for BDW GT3 (Damien Lespiau)
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
All the somewhat recent VBT specs and the kernel have different format
for the eDP block than what the tool decodes. What the tool does *may*
be correct for really old VBT, but I have no specs or other reference to
suppor this. Just do what the kernel does, that's what we're interested
in anyway.
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
When building within the android tree (specifically in /external)
the compilation fails due to the wrong versions of some header files
getting picked up. This commit adds some include paths to ensure the
correct headers are found
Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Someone with actual automake-fu really needs to fix this up for real
since compiling a bunch of source files again, with broken dep
tracking even just because we can't link against a .la somehow really
isn't too awesome.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
quick_dump built fine, but it could actually run, since a lot of the
linking happens at run time. There is one hack where we redefine the
environment stuff, since depending on igt_aux means we have to pull in
libdrm, which I do not want to do.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.
One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
