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https://github.com/tiagovignatti/intel-gpu-tools.git
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intel_bios_reader: Add support to dump MIPI Configuration Block #52
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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@ -85,6 +85,8 @@ struct bdb_header {
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#define BDB_LVDS_LFP_DATA 42
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#define BDB_LVDS_BACKLIGHT 43
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#define BDB_LVDS_POWER 44
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#define BDB_MIPI_CONFIG 52
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#define BDB_MIPI_SEQUENCE 53
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#define BDB_SKIP 254 /* VBIOS private block, ignore */
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struct bdb_general_features {
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@ -597,6 +599,136 @@ struct bdb_edp {
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uint16_t edp_t3_optimization;
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} __attribute__ ((packed));
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/* Block 52 contains MiPi Panel info
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* 6 such enteries will there. Index into correct
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* entery is based on the panel_index in #40 LFP
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*/
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#define MAX_MIPI_CONFIGURATIONS 6
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struct mipi_config {
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uint16_t panel_id;
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/* General Params */
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uint32_t dithering:1;
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uint32_t rsvd1:1;
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uint32_t panel_type:1;
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uint32_t panel_arch_type:2;
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uint32_t cmd_mode:1;
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uint32_t vtm:2;
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uint32_t cabc:1;
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uint32_t pwm_blc:1;
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/* Bit 13:10
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* 000 - Reserved, 001 - RGB565, 002 - RGB666,
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* 011 - RGB666Loosely packed, 100 - RGB888,
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* others - rsvd
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*/
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uint32_t videomode_color_format:4;
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/* Bit 15:14
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* 0 - No rotation, 1 - 90 degree
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* 2 - 180 degree, 3 - 270 degree
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*/
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uint32_t rotation:2;
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uint32_t bta:1;
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uint32_t rsvd2:15;
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/* 2 byte Port Description */
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uint16_t dual_link:2;
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uint16_t lane_cnt:2;
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uint16_t rsvd3:12;
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/* 2 byte DSI COntroller params */
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/* 0 - Using DSI PHY, 1 - TE usage */
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uint16_t dsi_usage:1;
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uint16_t rsvd4:15;
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uint8_t rsvd5[5];
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uint32_t dsi_ddr_clk;
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uint32_t bridge_ref_clk;
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uint8_t byte_clk_sel:2;
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uint8_t rsvd6:6;
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/* DPHY Flags */
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uint16_t dphy_param_valid:1;
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uint16_t eot_disabled:1;
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uint16_t clk_stop:1;
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uint16_t rsvd7:13;
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uint32_t hs_tx_timeout;
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uint32_t lp_rx_timeout;
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uint32_t turn_around_timeout;
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uint32_t device_reset_timer;
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uint32_t master_init_timer;
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uint32_t dbi_bw_timer;
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uint32_t lp_byte_clk_val;
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/* 4 byte Dphy Params */
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uint32_t prepare_cnt:6;
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uint32_t rsvd8:2;
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uint32_t clk_zero_cnt:8;
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uint32_t trail_cnt:5;
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uint32_t rsvd9:3;
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uint32_t exit_zero_cnt:6;
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uint32_t rsvd10:2;
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uint32_t clk_lane_switch_cnt;
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uint32_t hl_switch_cnt;
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uint32_t rsvd11[6];
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/* timings based on dphy spec */
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uint8_t tclk_miss;
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uint8_t tclk_post;
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uint8_t rsvd12;
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uint8_t tclk_pre;
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uint8_t tclk_prepare;
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uint8_t tclk_settle;
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uint8_t tclk_term_enable;
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uint8_t tclk_trail;
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uint16_t tclk_prepare_clkzero;
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uint8_t rsvd13;
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uint8_t td_term_enable;
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uint8_t teot;
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uint8_t ths_exit;
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uint8_t ths_prepare;
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uint16_t ths_prepare_hszero;
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uint8_t rsvd14;
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uint8_t ths_settle;
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uint8_t ths_skip;
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uint8_t ths_trail;
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uint8_t tinit;
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uint8_t tlpx;
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uint8_t rsvd15[3];
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/* GPIOs */
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uint8_t panel_enable;
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uint8_t bl_enable;
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uint8_t pwm_enable;
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uint8_t reset_r_n;
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uint8_t pwr_down_r;
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uint8_t stdby_r_n;
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} __attribute__ ((packed));
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/* Block 52 contains MiPi configuration block
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* 6 * bdb_mipi_config, followed by 6 pps data
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* block below
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*/
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struct mipi_pps_data {
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uint16_t panel_on_delay;
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uint16_t bl_enable_delay;
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uint16_t bl_disable_delay;
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uint16_t panel_off_delay;
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uint16_t panel_power_cycle_delay;
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} __attribute__ ((packed));
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struct bdb_mipi_config {
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struct mipi_config config[MAX_MIPI_CONFIGURATIONS];
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struct mipi_pps_data pps[MAX_MIPI_CONFIGURATIONS];
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} __attribute__ ((packed));
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/*
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* Driver<->VBIOS interaction occurs through scratch bits in
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* GR18 & SWF*.
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@ -696,6 +696,94 @@ static void dump_sdvo_lvds_options(const struct bdb_block *block)
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printf("\tmisc[3]: %x\n", options->panel_misc_bits_4);
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}
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static void dump_mipi_config(const struct bdb_block *block)
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{
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struct bdb_mipi_config *start = block->data;
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struct mipi_config *config;
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struct mipi_pps_data *pps;
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config = &start->config[panel_type];
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pps = &start->pps[panel_type];
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printf("\tGeneral Param\n");
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printf("\t\t BTA disable: %s\n", config->bta ? "Disabled" : "Enabled");
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printf("\t\t Video Mode Color Format: ");
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if (config->videomode_color_format == 0)
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printf("Not supported\n");
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else if (config->videomode_color_format == 1)
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printf("RGB565\n");
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else if (config->videomode_color_format == 2)
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printf("RGB666\n");
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else if (config->videomode_color_format == 3)
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printf("RGB666 Loosely Packed\n");
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else if (config->videomode_color_format == 4)
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printf("RGB888\n");
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printf("\t\t PPS GPIO Pins: %s \n", config->pwm_blc ? "Using SOC" : "Using PMIC");
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printf("\t\t CABC Support: %s\n", config->cabc ? "supported" : "not supported");
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//insert video mode type
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printf("\t\t Mode: %s\n", config->cmd_mode ? "COMMAND" : "VIDEO");
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printf("\t\t Dithering: %s\n", config->dithering ? "done in Display Controller" : "done in Panel Controller");
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printf("\tPort Desc\n");
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//insert pixel overlap count
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printf("\t\t Lane Count: %d\n", config->lane_cnt + 1);
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printf("\t\t Dual Link Support: ");
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if (config->dual_link == 0)
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printf("not supported\n");
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else if (config->dual_link == 1)
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printf("Front Back mode\n");
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else
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printf("Pixel Alternative Mode\n");
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printf("\tDphy Flags\n");
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printf("\t\t Clock Stop: %s\n", config->clk_stop ? "ENABLED" : "DISABLED");
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printf("\t\t EOT disabled: %s\n\n", config->eot_disabled ? "EOT not to be sent" : "EOT to be sent");
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printf("\tHSTxTimeOut: 0x%x\n", config->hs_tx_timeout);
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printf("\tLPRXTimeOut: 0x%x\n", config->lp_rx_timeout);
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printf("\tTurnAroundTimeOut: 0x%x\n", config->turn_around_timeout);
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printf("\tDeviceResetTimer: 0x%x\n", config->device_reset_timer);
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printf("\tMasterinitTimer: 0x%x\n", config->master_init_timer);
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printf("\tDBIBandwidthTimer: 0x%x\n", config->dbi_bw_timer);
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printf("\tLpByteClkValue: 0x%x\n\n", config->lp_byte_clk_val);
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printf("\tDphy Params\n");
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printf("\t\tExit to zero Count: 0x%x\n", config->exit_zero_cnt);
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printf("\t\tTrail Count: 0x%X\n", config->trail_cnt);
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printf("\t\tClk zero count: 0x%x\n", config->clk_zero_cnt);
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printf("\t\tPrepare count:0x%x\n\n", config->prepare_cnt);
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printf("\tClockLaneSwitchingCount: 0x%x\n", config->clk_lane_switch_cnt);
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printf("\tHighToLowSwitchingCount: 0x%x\n\n", config->hl_switch_cnt);
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printf("\tTimings based on Dphy spec\n");
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printf("\t\tTClkMiss: 0x%x\n", config->tclk_miss);
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printf("\t\tTClkPost: 0x%x\n", config->tclk_post);
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printf("\t\tTClkPre: 0x%x\n", config->tclk_pre);
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printf("\t\tTClkPrepare: 0x%x\n", config->tclk_prepare);
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printf("\t\tTClkSettle: 0x%x\n", config->tclk_settle);
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printf("\t\tTClkTermEnable: 0x%x\n\n", config->tclk_term_enable);
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printf("\tTClkTrail: 0x%x\n", config->tclk_trail);
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printf("\tTClkPrepareTClkZero: 0x%x\n", config->tclk_prepare_clkzero);
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printf("\tTHSExit: 0x%x\n", config->ths_exit);
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printf("\tTHsPrepare: 0x%x\n", config->ths_prepare);
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printf("\tTHsPrepareTHsZero: 0x%x\n", config->ths_prepare_hszero);
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printf("\tTHSSettle: 0x%x\n", config->ths_settle);
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printf("\tTHSSkip: 0x%x\n", config->ths_skip);
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printf("\tTHsTrail: 0x%x\n", config->ths_trail);
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printf("\tTInit: 0x%x\n", config->tinit);
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printf("\tTLPX: 0x%x\n", config->tlpx);
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printf("\tMIPI PPS\n");
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printf("\t\tPanel power ON delay: %d\n", pps->panel_on_delay);
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printf("\t\tPanel power on to Baklight enable delay: %d\n", pps->bl_enable_delay);
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printf("\t\tBacklight disable to Panel power OFF delay: %d\n", pps->bl_disable_delay);
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printf("\t\tPanel power OFF delay: %d\n", pps->panel_off_delay);
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printf("\t\tPanel power cycle delay: %d\n", pps->panel_power_cycle_delay);
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}
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static int
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get_device_id(unsigned char *bios)
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{
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@ -775,6 +863,11 @@ struct dumper dumpers[] = {
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.name = "eDP block",
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.dump = dump_edp,
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},
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{
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.id = BDB_MIPI_CONFIG,
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.name = "MIPI configuration block",
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.dump = dump_mipi_config,
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},
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};
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static void hex_dump(const struct bdb_block *block)
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@ -948,6 +1041,7 @@ int main(int argc, char **argv)
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dump_section(BDB_DRIVER_FEATURES, size);
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dump_section(BDB_EDP, size);
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dump_section(BDB_MIPI_CONFIG, size);
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for (i = 0; i < 256; i++)
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dump_section(i, size);
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