This patch adds support for dumping audio registers of Broxton.
Signed-off-by: Lu, Han <han.lu@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
This patch adds the details dump for audio registers of Cherryview.
Signed-off-by: Libin Yang <libin.yang@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.
One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This patch fixes the reversed CTS/M value index when dumping the
'audio M/CTS programing enable' register.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This patch adds support for dumping audio registers of Valleyview,
by reusing Ironlake code with a different base address and pipe number.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Most audio config registers of Ironlake, Haswell and Broadwell are almost same
although the register names or some bit fields have little difference.
And HSW and BDW already share their code.
This patch further shares code for ILK and HSW/BDW:
- ILK and HSW/BDW define their own base address to dump audio & display registers.
- Small functions to dump a specific register are defined and shared.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
It's for future code sharing because some registers define their bit fields
according to the number of pipes.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
A macro IS_HASWELL_PLUS(devid) is defined to cover Haswell and its successors,
for code sharing. Now it covers HSW and BDW.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Layout of display and audio registers can be same for different Intel GPUs.
For code sharing, this patches defines functions to
- set the base address of display and audio registers
- dump registers using the base address and an offset
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
This debug register provides test feedback of the audio M values (DP)
or CTS values (HDMI)
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This patch dumps this debug register and parse the data for Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This patch dumps debug registers to check audio immediate command, response
and status.
The audio driver will fall back into immediate command mode if normal
communication between controller and codec is dead.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
[Ben: Small printf changes to remove compiler warning]
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This patch renames Haswell audio dump function and reuses it for Broadwell.
Since Haswell, audio registers are moved from the south display engine to the
north display engine. And the audio register layout is same for Haswell and its
successors like Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
For Haswell, some audio configuration registers have changed their name and
some bit definitions.
This patch applies the changes, and uses subfunctions to parse registers for
code reuse.
Here is the name change list:
Audio configuration: AUD_CONFIG_x to AUD_TCx_CONFIG
Audio Misc Control: AUD_MISC_CTRL_x to AUD_Cn_MISC_CTRL
Audio M & CTS programming enable: AUD_CTS_ENABLE_x to AUD_TCx_M_CTS_ENABLE
Audio EDID data block: AUD_HDMIW_HDMIEDID_x to AUD_TCx_EDID_DATA
Audio Widget Data Island Packet: AUD_HDMIW_INFOFR_x to AUD_TCx_AUD_INFOFR
Audio Pipe and Converter Configs: AUD_PORT_EN_HD_CFG to AUD_PIPE_CONV_CFG
Audio Digital Converter: AUD_OUT_DIG_CNVT_x to AUD_Cn_DIG_CNVT
Audio Stream Descriptor Format: AUD_OUT_STR_DESC_x to AUD_Cn_STR_DESC
Audio Connect List Entry & Length: AUD_PINW_CONNLNG_LIST_x to
AUD_TCx_PIN_PIPE_CONN_ENTRY_LNGTH
Audio Connection Select Control: AUD_PINW_CONNLNG_SEL to AUD_PIPE_CONN_SEL_CTRL
Audio DIP & ELD Control State: AUD_DIP_ELD_CTRL_ST_x to AUD_TCx_DIP_ELD_CTRL_ST
Audio HDMI FIFO status: AUD_HDMIW_STATUS to AUD_HDMI_FIFO_STATUS
NOTE:
For Tx, x = A/B/C, meaning Transcoder A/B/C.
For Cn, n = 1/2/3, meaning audio converter 1/2/3.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This patch makes the file to follow kernel coding style:
- replace leading spaces with tabs for alignment
- fix some minor format issues
But the max length of a line is set to 120 characters for readability
on high resolution displays.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
The PCH transcoder config register (PCH_TRANS_CONF, 0xf0008) is not the
correct config register for transcoder A, B or C. This register is in
PCH and for CRT display, nothing to do with display audio.
So This patch removes misuse of it as config register for transcoder A/B/C.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
there're three Ports B/C/D used for selection by each transcoder A/B/C.
Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This makes the SNB/IVY Audio DIP values aligned with others.
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Required to compile with Solaris Studio cc compiler.
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The original test mistakenly calls dump_cpt() for Ironlake,
due to HAS_PCH_SPLIT := IS_GEN5 || IS_GEN6 || IS_GEN7.
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The raw channel count is not user friendly and may be misleading.
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
- no need to show the 1-bit AUD_OUT_DIG_CNVT_* as hex value
- show the Connection_select_Control_* bits as hex values
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Convert "" (Hex 00ad) to "-" (Hex 2d), the former leads to ugly outputs
in some situations.
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This is vital in a multi-GPU system so that we only test the Intel card
and not the discrete GPUs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
