dma-buf new API consists of:
- mmap(dma_buf_fd, ...): the ability to map a dma-buf file-descriptor of a
graphics buffer to the userspace, and more importantly, to actually write on
the mapped pointer (which was not possible before). It’s worth noting that the
Direct Rendering Manager (DRM) and the hardware driver implementation are
fundamentally important to safely export the graphics handle to be mapped.
- ioctl(dma_buf_fd, DMA_BUF_IOCTL_SYNC, &args): cache coherency management in
cases where the CPU and GPU devices are being accessed through dma-buf at the
same time. Coherency markers, which forward directly to existing dma-buf
device drivers vfunc hooks, are exposed to the userspace through the
DMA_BUF_IOCTL_SYNC ioctl and have to be used before and after the mapped area
is accessed. This is fundamentally important in hardware architectures where
the graphics engine and the CPU cores don't share caches but also important in
other type of hardware where the memory hierarchy is (most of the time)
coherent. More details can be found in this patch set:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c11e391da2a8fe973c3c2398452000bed505851e
v2: use uint32_t for color type, increment the variable and add
--interactive-debug=paint
v3: use igt_display_commit() to mode set the crtc so the rectangle is shown
painted; also added Testcase description on the beginning of the file.
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
On the CI machines, the coherency tests are flip-flopping on byt/bsw.
Undesirable as they should always fail (until we have a good w/a).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This could happen when the selected pipe cannot be used with the connected
port due do HW constrains.
v2: Apply review comment (Marius)
bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86763
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
On Cherryview PIPE_C can only be connected to PORT_D (bspec).
The driver properly reports the crtc_mask for the encoder, however the
mismatch between pipe and port is not reported back to the test.
Add support for detecting this case so the test can be skipped.
v2: Apply review comments (Marius)
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
When no display is connected all kms_plane subtests pass although
no testing is done.
Change it by reporting the subtests as skipped.
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
One property lost in the expansion for various coherency checks was
ensuring that every time we overwrote the batch it had a unique value
(to ensure that the GPU was seeing the latest value).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Look at handling of multiple batches within the buffer and avoiding as
much synchronisation as possible.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Enable testing on all connectors that have the "scaling mode"
property set.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93012
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Switched from DRIVER_INTEL to DRIVER_ANY to enable test
on all hardware.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Changed the DRM format to LOCAL_DRM_FORMAT_MOD_NONE since it
is hardware agnostic.
Also fixed formatting/tabs.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
ref_crc is never assigned or read, and can be safely
removed.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
pipe_crc in data_t is assigned an allocated memory space and
then later free'd. But it is never used for any comparisons.
It should therefore be safe to remove pipe_crc and the crc
requirement.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Remove devid from data_t since it is never read.
Also remove one assignment to devid.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
We can simply sscanf the crc in one go. Also split up the igt asserts to
get better details about what went wrong.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Before we print the exitcode to the debug/kmsg logs, we should inspect
what its final value will be. For example, in the case of running
multiple subtests which all happen to be skipped, igt_exitcode is 0, but
the final exit code will be 77.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Tested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Unlike in the kernel driver coding style, IS_965() matches the platform
and all subsequent ones. Replace IS_965() with suitable but less
confusing alternatives.
Most occurences are on code paths that only get called for gens 2, 3 and
4, so replace those with IS_GEN4(). In the one other call site just flip
the condition to check for gens 2 and 3 instead.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
It's also confusing as the style differs from the kernel (exact platform
in the kernel vs. the platform and any later ones in igt).
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
No functional change and no change in the current format.
Just introducing the missing Kabylake name strings.
v2: Duh! forgot the ")"...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
When using the kernel set-domain cache management, we need to set the
domain as appropriate for our pointer access. In this case we access the
buffer through a CPU mmap, and so we must request access via the CPU
domain.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When looking at a pair of GPU writes, where we want to make sure that
the clean cacheline is invalidated automatically, we want to reuse that
cacheline whilst we know it remains valid (i.e. repeat the test using a
new value to the same location).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
32bit builds ran into a silly multiplication issue when computing
elapsed nanoseconds of more than 2s...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Since the value in the bo may be altered by the test, we only want to
repeat phases of the test to avoid breaking the test itself.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we assume that the first settimer and clock_gettime() itself have
appreciable overhead, try to exclude those from the calibration delay.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Alternate between two values written by the GPU so that we can look for
stale cachelines without having to overwrite the value with the CPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
On Baytrail, Braswell and Atoms beyond we see an issue where the mfence
is insufficient to force the cacheline to be coherent (i.e. such that
writes from the GPU are visible by the CPU after the call to clflush). A
second clflush is ordered with an earlier clflush to the same address
and this appears sufficient to give the coherency required for GPU/CPU
interop.
Testcase: igt/gem_exec_flush
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Akash Goel <akash.goel@intel.com>
A basic check that the execbuf flushes writes from the batch and that
they are coherent afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When waiting for the producers to start, use the cond/mutex of the
Nth producer and not always the first.
Spotted-by: "Goel, Akash" <akash.goel@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
igt_fork_hang_detector() was called from a igt_fixture block, while its
counterpart (igt_stop_hang_detector) was called normally, causing
SIGTERM to be sent when running under check target.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
This change mirrors the change in drm made by krh@redhat.com
on "Mon Apr 6 17:18:17 2009" on the drm branch intel_on_all_hw.
The assert(major < 1) is only needed for the legacy intel driver.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Switched to assert helpers to enable better error output.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
[tomeu: fix test of major version to be lte]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
