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https://github.com/tiagovignatti/intel-gpu-tools.git
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igt/gem_exec_flush: Test continuously rewriting the batch
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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parent
d654aa0d09
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9f2621e1b5
@ -232,10 +232,180 @@ overwrite:
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igt_waitchildren();
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}
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enum batch_mode {
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BATCH_KERNEL,
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BATCH_USER,
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BATCH_CPU,
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BATCH_GTT,
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BATCH_WC,
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};
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static void batch(int fd, unsigned ring, int nchild, int timeout,
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enum batch_mode mode)
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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igt_fork(child, nchild) {
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const uint32_t bbe = MI_BATCH_BUFFER_END;
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struct drm_i915_gem_exec_object2 obj[2];
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struct drm_i915_gem_relocation_entry reloc;
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struct drm_i915_gem_execbuffer2 execbuf;
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unsigned long cycles = 0;
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uint32_t *ptr;
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uint32_t *map;
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int i;
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memset(obj, 0, sizeof(obj));
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obj[0].handle = gem_create(fd, 4096);
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obj[0].flags |= EXEC_OBJECT_WRITE;
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map = gem_mmap__cpu(fd, obj[0].handle, 0, 4096, PROT_WRITE);
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gem_set_domain(fd, obj[0].handle,
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I915_GEM_DOMAIN_CPU,
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I915_GEM_DOMAIN_CPU);
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for (i = 0; i < 1024; i++)
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map[i] = 0xabcdabcd;
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)obj;
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execbuf.buffer_count = 2;
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execbuf.flags = ring | (1 << 11) | (1<<12);
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if (gen < 6)
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execbuf.flags |= I915_EXEC_SECURE;
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obj[1].handle = gem_create(fd, 4096);
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gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
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igt_require(__gem_execbuf(fd, &execbuf) == 0);
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obj[1].relocation_count = 1;
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obj[1].relocs_ptr = (uintptr_t)&reloc;
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switch (mode) {
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case BATCH_CPU:
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case BATCH_USER:
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ptr = gem_mmap__cpu(fd, obj[1].handle, 0, 4096,
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PROT_WRITE);
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break;
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case BATCH_WC:
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ptr = gem_mmap__wc(fd, obj[1].handle, 0, 4096,
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PROT_WRITE);
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break;
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case BATCH_GTT:
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ptr = gem_mmap__gtt(fd, obj[1].handle, 4096,
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PROT_WRITE);
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break;
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case BATCH_KERNEL:
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ptr = mmap(0, 4096, PROT_WRITE,
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MAP_PRIVATE | MAP_ANON, -1, 0);
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break;
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}
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memset(&reloc, 0, sizeof(reloc));
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reloc.presumed_offset = obj[0].offset;
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reloc.offset = sizeof(uint32_t);
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if (gen >= 4 && gen < 8)
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reloc.offset += sizeof(uint32_t);
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reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
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igt_timeout(timeout) {
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for (i = 0; i < 1024; i++) {
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uint64_t offset;
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uint32_t *b = ptr;
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switch (mode) {
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case BATCH_CPU:
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gem_set_domain(fd, obj[1].handle,
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I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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break;
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case BATCH_WC:
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case BATCH_GTT:
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gem_set_domain(fd, obj[1].handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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break;
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case BATCH_USER:
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gem_sync(fd, obj[1].handle);
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break;
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case BATCH_KERNEL:
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break;
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}
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reloc.delta = i * sizeof(uint32_t);
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offset = reloc.presumed_offset + reloc.delta;
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*b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
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if (gen >= 8) {
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*b++ = offset;
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*b++ = offset >> 32;
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} else if (gen >= 4) {
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*b++ = 0;
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*b++ = offset;
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} else {
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b[-1] -= 1;
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*b++ = offset;
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}
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*b++ = i;
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*b++ = MI_BATCH_BUFFER_END;
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switch (mode) {
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case BATCH_KERNEL:
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gem_write(fd, obj[1].handle, 0,
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ptr, (b - ptr) * sizeof(uint32_t));
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break;
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case BATCH_USER:
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igt_clflush_range(ptr, (b - ptr) * sizeof(uint32_t));
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break;
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case BATCH_CPU:
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case BATCH_GTT:
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case BATCH_WC:
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break;
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}
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gem_execbuf(fd, &execbuf);
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cycles++;
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}
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gem_set_domain(fd, obj[0].handle,
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I915_GEM_DOMAIN_CPU,
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I915_GEM_DOMAIN_CPU);
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for (i = 0; i < 1024; i++) {
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igt_assert_eq(map[i], i);
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map[i] = 0xabcdabcd;
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}
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}
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igt_info("Child[%d]: %lu cycles\n", child, cycles);
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munmap(ptr, 4096);
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gem_close(fd, obj[1].handle);
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munmap(map, 4096);
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gem_close(fd, obj[0].handle);
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}
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igt_waitchildren();
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}
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igt_main
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{
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const struct intel_execution_engine *e;
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const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
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const struct batch {
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const char *name;
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unsigned mode;
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} batches[] = {
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{ "kernel", BATCH_KERNEL },
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{ "user", BATCH_USER },
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{ "cpu", BATCH_CPU },
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{ "gtt", BATCH_GTT },
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{ "wc", BATCH_WC },
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{ NULL }
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};
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const struct mode {
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const char *name;
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unsigned flags;
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@ -245,7 +415,7 @@ igt_main
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{ "pro", KERNEL },
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{ "prw", KERNEL | WRITE },
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{ "set", SET_DOMAIN | WRITE },
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{ NULL },
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{ NULL }
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};
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int gen = -1;
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int fd = -1;
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@ -271,6 +441,14 @@ igt_main
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"MI_STORE_DATA broken on gen6 bsd\n");
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}
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for (const struct batch *b = batches; b->name; b++) {
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igt_subtest_f("%sbatch-%s-%s",
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e->exec_id == 0 ? "basic-" : "",
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b->name,
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e->name)
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batch(fd, ring, ncpus, timeout, b->mode);
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}
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for (const struct mode *m = modes; m->name; m++) {
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igt_subtest_f("%suc-%s-%s",
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e->exec_id == 0 ? "basic-" : "",
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