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20 Commits

Author SHA1 Message Date
Xiang, Haihao
737d248a12 assembler: distinguish the channel of .z from the condition of .z 
The scratch patch only works for generic register

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631
Tested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
 2014-05-19 22:49:25 +01:00
Thomas Wood
c3e9198dd0 assembler: define YY_NO_INPUT to prevent unused symbol warnings 
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 2014-02-06 18:32:09 +01:00
Matt Turner
160feafa2d assembler: Add support for the SENDC instruction. 
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
 2013-05-22 13:58:36 -07:00
Damien Lespiau
d94e8a6cf0 assembler: Add location support 
Let's generate location information about the tokens we are parsing.
This can be used to give accurate location when reporting errors and
warnings.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
 2013-03-04 15:54:39 +00:00
Damien Lespiau
191c85976d build: Integrate the merged gen assembler in the build system 
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
 2013-03-04 15:54:35 +00:00
Eric Anholt
9b40c3724a Add autotools build system, and rearrange directory layout. 2013-03-04 15:54:23 +00:00
Eric Anholt
3bcf6b29cd Add support for register-indirect access in destination registers. 
This is untested.  Also, a few bits for source operand register-indirect access
sneak in with this commit.
 2013-03-04 15:54:23 +00:00
Eric Anholt
de1a889fe3 Avoid shift/reduce conflict in predicate by making flagreg and subreg 1 token. 
Thanks to keithp for pointing out where the conflict was.
 2013-03-04 15:54:23 +00:00
Eric Anholt
0ed5d93cc2 Add support for predicate control. 
This is untested on programs using predicate control, and also causes a
shift/reduce conflict.
 2013-03-04 15:54:22 +00:00
Eric Anholt
6a88ada7e8 Add support for swizzle control on source operands. 
This required restructuring to store source operands in a new structure rather
than being stored in instructions, as swizzle is align16-only and shares
storage with other fields for align1 mode.

These changes were not tested on real programs using swizzle.
 2013-03-04 15:54:22 +00:00
Eric Anholt
908f37d92d Add support for more instruction options. 2013-03-04 15:54:22 +00:00
Eric Anholt
883408eab8 Add rules for more registers, and use some for destinations. 2013-03-04 15:54:22 +00:00
Eric Anholt
f914c6ace2 Add many more opcodes. 2013-03-04 15:54:22 +00:00
Eric Anholt
569990bf6b Lex the register number with the register name. 
This avoids the need for a start condition to prevent for example g1.8<0,1,0>UW
being lexed as GENREG NUMBER LANGLE etc. rather than
GENREG INTEGER DOT INTEGER LANGLE etc.
 2013-03-04 15:54:22 +00:00
Eric Anholt
3d36079ae3 Add syntax for extended math send functions, and adjust packed_yuv_sf for it. 2013-03-04 15:54:22 +00:00
Eric Anholt
e865196a9d Add a syntax for urb write messages. 2013-03-04 15:54:21 +00:00
Eric Anholt
dc96c56d9e Add support for negate and abs to source operands. 2013-03-04 15:54:21 +00:00
Eric Anholt
f2f18561e5 C warnings cleanup. 2013-03-04 15:54:20 +00:00
Eric Anholt
6c98c8d578 Get the wm program to parse. 2013-03-04 15:54:20 +00:00
Eric Anholt
22a1063cc0 Initial gen4asm code. 2013-03-04 15:54:20 +00:00