Check the pipe assignment for each plane (excluding plane C since the
kernel doesn't use that one) and pick the first one that's assigned to
the target pipe.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add CHV support by adding a pipe_offset[] thingy (like we have in the
kernel) to deal with the wonky register offsets.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Use the pre configured pci device from config also
in write path.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
The drm core doesn't check unused fields of ADDFB2 for pre-FB_MODIFIERS
userspace, so use igt_require_fb_modifiers(). Also, the size of the
ioctl changed with the addition of the modifiers, so it is necessary to
use the LOCAL_ version of it, otherwise some data may get truncated.
v2: Improve commit message. (Thomas)
Remove one spurious change to use LOCAL_DRM_IOCTL_ADDFB2. (Thomas)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2 subparts of gem_bad_reloc check that the reloc address is below the
global gtt boundary. However, when executing from ppgtt the reloc
address can be greater than that and still be a valid address.
To be sure that we're using the right upper limit, select it based on
the ppgtt mode.
Cc: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Disable -Wcast-qual temporarily to allow memchr_inv to return non-const
data (similar to memchr), without causing a compiler warning.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
These have been replaced by subtests in gem_storedw_loop.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Install the register definition files and use them by default in
intel_reg.
v2: remove redundant path check
Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Remove quick_dump as it has been replaced by the intel_reg tool and move
the register definition files to tools/registers.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Add --as-needed to the linker flags to reduce the number of shared
library dependencies, since not all the tests and tools use all the
libraries required by the helper library (for example, many tests do not
use cairo). This helps portability of the binaries and also makes a
very small improvement to the execution speed and memory consumption.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
The VEBOX ring is not available in generations before Haswell, so make
tests that use it skip instead of fail in previous gens.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
In the reset-pin-leak test we were calling
igt_set_stop_rings(STOP_RING_DEFAULTS) which sets the
stop_rings bits for all gpu engines. But we only submit
work to the render engine. When TDR is enabled (as it is
in Android currently) only the render engine gets reset,
which clears the stop_rings bit for the render engine but
not for the other engines. This causes the test to fail on
the second iteration because stop_rings is not clear.
So just set the stop_rings bit for the engine we are going
to hang, namely the render engine.
Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
I'm using this to debug some aspects of the GTT tracking.
While at it, do a small rename and fix the ASCII art.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Add a header that includes all the headers for the library. This allows
reorganisation of the library without affecting programs using it and
also simplifies the headers that need to be included to use the library.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Built sources are generated by "make all", so should be removed by "make
clean". This also ensures "distcleancheck" passes.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
intel_iosf_sb_read, intel_iosf_sb_write, intel_reg_dumper,
intel_reg_read, intel_reg_snapshot, intel_reg_write, intel_vga_read, and
intel_vga_write have been deprecated in favor of intel_reg. Remove the
deprecated tools. intel_reg does everything they do, and more.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Just like we did for PSR, let's do it for FBC. FBC gets reenabled in
just 50ms, so the 5000ms timeout is huge. On the other hand, we only
pay the 5000ms timeout full price 9 times when running
kms_frontbuffer_tracking --fbc-only, so this change shouldn't save too
much time.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
PSR only takes up to 100ms to be enabled, but we were using 5000ms
timeouts. The problem with PSR is that the MMAP_GTT tests have to
assert that PSR is disabled and stays disabled during the whole
timeout, so that 5s cost is a little to high when we consider that we
do the full 5s wait 74 times when running kms_frontbuffer_tracking
--psr-only.
By reducing to 2s we still make sure we're safe, since we're waiting
20x the time PSR needs to get reenabled, and we reduce the runtime of
running kms_frontbuffer_tracking --psr-only from 14m10s to 10m29s.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
SNA starts by feeding in deliberately bad ioctls in order to detect the
kernel interface versions. A quick solution is to always feed it to the
ioctl and only record the trace if it is valid.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we already tested the combination of m1+m2, don't test m2+m1 later:
the drawing pattern used already has 4 squares, so we're already
testing the "m2 followed by m1" case.
This should reduce the test time from about 60s to about 30s.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Instead of having a single pair of methods per subtest. Having this in
pairs is not very useful since we end doing all the drawing methods
per subtest anyway.
This saves a few modesets, which makes eDP slightly faster - about 22s
on my local machine.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
We now have per-pixel-format FBs and CRC values. Also t->format to
indicate the format we're using on the subtest. We still only use the
default RGB888 format (AKA FORMAT_DEFAULT) for all tests since
multiplying the current number of tests by the number of new pixel
formats doesn't sound like a great idea.
With this, it should be really easy to add new tests that use
different pixel formats.
Also, if you want a full IGT run on a specific pixel format, all you
need to do is to change FORMAT_DEFAULT.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
We're not using those formats yet, but a simple change to create_fb()
allows us to use these formats without problems now.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
We want to add support for different pixel formats and the current
hardcoded pixel values won't work with that. So add enum color and
its auxiliary functions so we can decide the pixel values based on the
chosen color enum.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
It is create_fb() who is going to decide the buffer format based on
the arguments provided by the caller. This is another step for the
non-XRGB8888 support.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
The wrapper will do a few additional things when we add support for
formats different than XRGB8888.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Now that the MMAP_WC operations call the dirty ioctl, PSR gets
reenabled after some time. So we have to adjust op_disables_psr() to
take that into account.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Due to the nature of accessing a tiled buffer in an untiled way, we
used to loop through the whole buffer all the time. Add a small
mechanism to just break in case we know we already wrote every pixel
we should have written.
On kms_frontbuffer_tracknig/fbc-2p-primscrn-pri-shrfb-draw-pwrite
(with a 3200x1800 primary screen and a 1920x1080 secondary screen), I
could reduce the runtime from ~7.53s to ~6.01s.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
