Xiang, Haihao
9d2be25838
sampler, urb write, null and gateway on Sandybridge are same as Ironlake.
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Xiang, Haihao
a8458d5d5e
add support for data port read on Sandybridge
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Xiang, Haihao
61784dbc97
add support for data port write on Sandybridge.
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Xiang, Haihao
4f777e73f1
fix send instruction on Sandybridge
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Send doesn't have implied move on Sandybridge, the SFID moves to bits[24,27] which
is used as the destination of the implied move on Prev GEN6.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Xiang, Haihao
55d81c4ce7
add AccWrCtrl flag on Sandybridge
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Xiang, Haihao
5bcf1f5a03
always set destination horiz stride for Align16 to 1 on Sandybridge.
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Zou Nan hai
db8aedc745
use left recursion instead of right recursion to avoid memory exhausted issue when compiling large source files
2013-03-04 15:54:27 +00:00
Zou Nan hai
c6f2da4e82
1. type syntax :ud :uw etc
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2. empty instruction option
3. remove a conflict
2013-03-04 15:54:26 +00:00
Zou Nan hai
5608d2765d
support simple expression
2013-03-04 15:54:26 +00:00
Xiang Haihao
549b751afb
Add support for GEN5
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Add a new option [-g n], n=4(GEN4),5(GEN5). If don't use -g,
the default value is 4(GEN4)
2013-03-04 15:54:26 +00:00
Zou Nanhai
be9bcee15f
Add support for labeled and conditional branches
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Signed-off-by: Keith Packard <keithp@keithp.com>
2013-03-04 15:54:26 +00:00
Zou Nan hai
807f8768e9
Add support for dp_read message.
2013-03-04 15:54:26 +00:00
Zou Nan hai
26afe90126
Add thread_spawner message target support.
2013-03-04 15:54:26 +00:00
Keith Packard
2033aea3dd
Add conditional support to assembler. Add align16 dest support to disasm.
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This is working towards round-tripping mesa programs. Still need indirect
register addressing and align16 source support.
2013-03-04 15:54:26 +00:00
Keith Packard
2d4d401d70
Add packed vector immediate values
2013-03-04 15:54:25 +00:00
Eric Anholt
4ee9c3d869
Add break, cont, and halt instructions.
2013-03-04 15:54:25 +00:00
Eric Anholt
f45ac8b2cc
Fix the exitcode type for ENDIF to be D instead of UD.
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Fixes the endif test.
2013-03-04 15:54:25 +00:00
Eric Anholt
960ca001ca
Fix initialization of null reg for ELSE, and set the pop count right.
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This fixes the ELSE test.
2013-03-04 15:54:24 +00:00
Eric Anholt
1f58efa747
Add support for the WAIT instruction.
2013-03-04 15:54:24 +00:00
Eric Anholt
330903ad81
Parse negative integers for imm32s, and don't exceed the IP count width field.
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This fixes the while test.
2013-03-04 15:54:24 +00:00
Eric Anholt
56cdee41af
Initialize the structure used for setting up the ip src/dst in branches/jumps.
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This fixes jmpi, if, and iff. The while test still fails to compile.
2013-03-04 15:54:24 +00:00
Eric Anholt
356ce76d44
Add a rule for the ELSE instruction.
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Untested.
2013-03-04 15:54:23 +00:00
Eric Anholt
1e907c7aed
Add rules for branch and jump instructions.
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Untested.
2013-03-04 15:54:23 +00:00
Eric Anholt
d77712994d
Add DO and ENDIF instructions.
2013-03-04 15:54:23 +00:00
Eric Anholt
74c81af3dd
Fix a compiler warning by defining struct {in,}direct_reg at the top level.
2013-03-04 15:54:23 +00:00
Eric Anholt
c8939edc28
Fix issues in the grammar that caused errors in bison.
2013-03-04 15:54:23 +00:00
Eric Anholt
9b40c3724a
Add autotools build system, and rearrange directory layout.
2013-03-04 15:54:23 +00:00
