flywithu/ntel-gpu-tools
1
0
Fork 0
mirror of https://github.com/tiagovignatti/intel-gpu-tools.git synced 2025-07-23 18:06:18 +00:00
Code Issues Releases Wiki Activity

sampler, urb write, null and gateway on Sandybridge are same as Ironlake.

Browse Source 
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
This commit is contained in:
Xiang, Haihao 2010-10-09 12:46:15 +08:00 committed by Damien Lespiau
parent a8458d5d5e
commit 9d2be25838
1 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
assembler/src/gram.y
View File

@ -557,7 +557,7 @@ post_dst: dst
msgtarget: NULL_TOKEN
{
if (gen_level == 5) {
if (gen_level >= 5) {
$$.bits2.send_gen5.sfid= BRW_MESSAGE_TARGET_NULL;
$$.bits3.generic_gen5.header_present = 0; /* ??? */
} else {
@ -567,7 +567,7 @@ msgtarget: NULL_TOKEN
| SAMPLER LPAREN INTEGER COMMA INTEGER COMMA
sampler_datatype RPAREN
{
if (gen_level == 5) {
if (gen_level >= 5) {
$$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_SAMPLER;
$$.bits3.generic_gen5.header_present = 1; /* ??? */
$$.bits3.sampler_gen5.binding_table_index = $3;
@ -620,7 +620,7 @@ msgtarget: NULL_TOKEN
}
| GATEWAY
{
if (gen_level == 5) {
if (gen_level >= 5) {
$$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_GATEWAY;
$$.bits3.generic_gen5.header_present = 0; /* ??? */
} else {
@ -695,7 +695,7 @@ msgtarget: NULL_TOKEN
| URB INTEGER urb_swizzle urb_allocate urb_used urb_complete
{
$$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_URB;
if (gen_level == 5) {
if (gen_level >= 5) {
$$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
$$.bits3.generic_gen5.header_present = 1;
$$.bits3.urb_gen5.opcode = BRW_URB_OPCODE_WRITE;
@ -721,7 +721,7 @@ msgtarget: NULL_TOKEN
{
$$.bits3.generic.msg_target =
BRW_MESSAGE_TARGET_THREAD_SPAWNER;
if (gen_level == 5) {
if (gen_level >= 5) {
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_THREAD_SPAWNER;
$$.bits3.generic_gen5.header_present = 0;