581 Commits

Author SHA1 Message Date
Damien Lespiau
3a5cf84317 stats: Add a way to specify if the data set is a population or a sample
This changes how we compute the variance. We want an unbiased variance
when reasoning about a sample.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-27 16:04:07 +01:00
Damien Lespiau
515cec1210 stats: Add a way to retrieve the standard deviation
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-27 16:03:27 +01:00
Damien Lespiau
e55a11d3eb stats: Be more precise and talk about mean, not average
There are several types of averages eg. mean, median and mode.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-27 16:03:27 +01:00
Damien Lespiau
de774ed31e skl_compute_wrpll: Don't try other dividers if we find a 0 central freq deviation
Paulo suggested that we could short-circuit the search for a good
divider if we find a 0 deviation of the DCO frequency from the central
frequency.

Out of the 373 test frequencies, 34 hit that fast path.

Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-25 17:49:34 +01:00
Damien Lespiau
26336385ac skl_compute_wrpll: Sync a comment with from the kernel code
Might as well try to keep the code in both this test and the kernel as
close as possible.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-25 17:49:34 +01:00
Damien Lespiau
dfebf08d9a skl_compute_wrpll: Fix the mininum deviation computation
Paulo noticed that, because we were only comparing positive deviations
with positive deviations and negative deviations with negative
deviations, we weren't actually always using the absolute minimal
deviation at all.

This improves the average deviation across all tested frequencies (373):

before: average deviation: 215.13
after: average deviation: 194.47

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-25 17:22:04 +01:00
Damien Lespiau
afdaeabbcf skl_compute_wrpll: Cycle through dividers, then central freqs
Follow Paulo's comment on the corresponding kernel patch.

This means we also have to move the break when we have cycled through
the even dividers as well.

This improves the number of even dividers used across the tested
frequencies (373) (at the expense of a slightly worse average deviation,
but "even dividers take precedence over a lower deviation".

before:
  even/odd dividers: 338/35
  average deviation: 206.52

after:
  even/odd dividers: 363/10
  average deviation: 215.13

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-25 17:22:04 +01:00
Damien Lespiau
efd2895f23 skl_compute_wrpll: Print the average deviation
It's interesting to watch the effect of some algorithm tweaks on the
average deviation between the central freq and the dco freq. A metric
we'd like to minimize.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-06-25 17:22:04 +01:00
Thomas Wood
aa75f37397 tools: print a warning for tools replaced by intel_reg
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-06-11 14:48:58 +01:00
Damien Lespiau
15f60217cc intel_display_crc: A new tool to play with display CRCs
The CRC debug interface is a bit more than a simple textual file in
debugfs as there are a small command language to control what we want
from them.

This tool starts, slowly, by allowing us to dump the pipe CRCs whenever
we want. It can be handy to check what is the current CRC when we reach
a certain state on the screen (when using --interactive-debug for
instance) against a known CRC.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-15 12:22:21 +01:00
Damien Lespiau
e949c42b49 quick_dump: Expand the WM cursor registers
The tool I used to generate that list doesn't support expanding the list
of registers when dealing with something like CUR_WM_A_*. Expand it by
hand for now (tm).

Remove CUR_PAL_${pipe}_* for the same reason (and because it's not very
useful to have).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-12 16:41:09 +01:00
Damien Lespiau
5f932c4dad quick_dump/skl: Add more pipe/plane registers
With the recent developments, add scaler and NV12 registers to the dump.
Also add the cursor registers that were missing in the first batch.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-11 19:31:26 +01:00
Damien Lespiau
f6155ac30c build: Add missing line continuation
When -lrt was added, it was missing a '\' at the end of line. Add it.

Cc: Tim Gore <tim.gore@intel.com>
Cc: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-11 17:55:36 +01:00
Damien Lespiau
cb57cdc632 skl_compute_wrpll: Prefer even dividers
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-08 17:55:30 +01:00
Damien Lespiau
b3ef2986ca skl_compute_wrpll: Count how many even/odd dividers we compute
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-08 17:55:30 +01:00
Damien Lespiau
8d1739dd84 skl_compute_wrpll: Make sure we respect the DCO frequency constraints
We might as well verify that we have a semblance of all being in order
by making sure the DCO frequency is within the expected bounds.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-08 17:55:30 +01:00
Damien Lespiau
acbcdbd8b7 skl_compute_wrpll: Add a way to test the SKL WRPLL algorithm
I had various problems (infinite loops, unable to compute dividers for
certain frequencies) after implementing a BSpec update. Much easier to
debug that in userspace.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-08 17:55:30 +01:00
Damien Lespiau
5dbeebc8aa compute_wrpll: Rename ddi_compute_wrpll to hsw_compute_wrpll
We're going to add the SKL version, time to rename the HSW/BDW one.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-05-08 17:55:30 +01:00
Jani Nikula
a734ac2058 rename global mmio variable to igt_global_mmio
Global variable names should reflect the fact that they are indeed
global, and at the very least they should not be as short as just
"mmio". Rename mmio to igt_global_mmio.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:13:43 +03:00
Jani Nikula
0bbbc6360f intel_vga_{read,write}: use INREG and OUTREG
Use INREG and OUTREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
33c2e8b083 intel_display_poller: use INREG and OUTREG
Use INREG and OUTREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
fb1515c170 intel_watermark: switch to INREG
Use INREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
12d785bcd4 intel_reg_{read,write}: switch to INREG and OUTREG
Use INREG and OUTREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
87eb37c86b intel_reg_checker: switch to INREG
Use INREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
e9f4c5f9b9 intel_backlight: switch to INREG and OUTREG
Use INREG and OUTREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Jani Nikula
510ac32db1 intel_reg: switch to INREG and OUTREG
Use INREG and OUTREG instead of using mmio directly.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-05-05 13:10:12 +03:00
Thomas Wood
40b45bace3 tools: add missing header to distributed sources
Make sure all the sources for intel_reg are included in the
distribution.

Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-04-27 17:34:41 +01:00
Thomas Wood
bad8834ee7 tools: update .gitignore
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-04-27 15:32:41 +01:00
Jani Nikula
dfda0b6aec intel_reg: introduce one intel_reg tool to rule them all
Three Tools for the Elven-kings under the sky,
	Seven for the Dwarf-lords in their halls of stone,
	Nine for Mortal Men doomed to die,
	One for the Dark Lord on his dark throne
	In the Land of Mordor where the Shadows lie.
	One Tool to rule them all, One Tool to find them,
	One Tool to bring them all and in the darkness bind them
	In the Land of Mordor where the Shadows lie.

		J.R.R. Tolkien's epigraph to The Lord of The Tools
		 | sed 's/Ring/Tool/g'

Introduce intel_reg as the one Intel graphics register multitool to
replace intel_reg_read, intel_reg_write, intel_iosf_sb_read,
intel_iosf_sb_write, intel_vga_read, intel_vga_write, intel_reg_dumper,
intel_reg_snapshot, and quick_dump.py.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-04-23 01:09:59 +03:00
Tim Gore
20ad3e55fb tools/quick_dump/makefile.am: add -lrt to get clock_gettime
Attempting to build IGT on linux without libunwind fails
due to tools/quick_dump not linking the rt library,
causing an undefined symbol error for clock_gettime.
Adding -lrt to the list of libraries in Makefile.am fixes
this.

Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-04-22 18:00:42 +01:00
Ville Syrjälä
4271b15f3c quick_dump: Fix undefined symbols from libunwind
../../lib/.libs/libintel_tools.a(igt_core.o): In function `print_backtrace':
intel-gpu-tools/lib/igt_core.c:981: undefined reference to `_Ux86_64_getcontext'
intel-gpu-tools/lib/igt_core.c:982: undefined reference to `_ULx86_64_init_local'
intel-gpu-tools/lib/igt_core.c:983: undefined reference to `_ULx86_64_step'
intel-gpu-tools/lib/igt_core.c:987: undefined reference to `_ULx86_64_get_proc_name'

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-04-16 16:38:03 +03:00
Ville Syrjälä
3dff4af5e0 quick_dump: Don't allow undefined symbols in _chipset.so
Every time _chipset.so has undefined symbols we fail to notice it
at build time and then get to wonder why quick_dump fails to actually
work. Pass -Wl,--no-undefined to the linker to get a build time error
instead of the current runtime error.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-04-16 16:38:03 +03:00
Imre Deak
074d8b440e tools/intel_reg_dumper: fix PIPECONF decode
- decode the register for BXT too
- decode interlace on VLV/CHV too
- don't decode rotation and bpc on platforms where these fields are not defined

Signed-off-by: Imre Deak <imre.deak@intel.com>
2015-04-08 15:29:44 +03:00
Imre Deak
07a58707c3 tools/intel_reg_dumper: fix DSPCNTR decode for BXT
Signed-off-by: Imre Deak <imre.deak@intel.com>
2015-04-08 14:52:37 +03:00
Imre Deak
7027227ca2 tools/intel_bios_read: fix SSC freq for BXT
On BXT the SSC reference frequency is fixed 100MHz.

Signed-off-by: Imre Deak <imre.deak@intel.com>
2015-04-08 14:52:37 +03:00
Imre Deak
1dc4884875 tools/intel_bios_reader: fix SSC freq for VLV/CHV
VLV/CHV has a fixed 100MHz SSC reference frequency.

Signed-off-by: Imre Deak <imre.deak@intel.com>
2015-04-08 14:52:36 +03:00
Thomas Wood
277ca2b992 lib: print a stack trace when a test assertion fails
Add an optional dependency on libunwind to print stack traces when a
test assertion fails.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2015-03-26 15:50:05 +00:00
Mika Kuoppala
559987fc01 tools/intel_error_decode: Add gen8+ fault data encodings
These two registers contains the 48bit fault address.

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:34 +02:00
Mika Kuoppala
f96bfb8e8c tools/intel_error_decode: Add decodings for FAULT_REG
Add decodings for FAULT_REG

v2: fix fault encodings and ignore addr type for gen8+ (Michel)
    fix engine mask

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:18 +02:00
Mika Kuoppala
0a2ef9c349 tools/intel_error_decode: Add ERROR decodings for gen8
Add ERROR decodings for gen8

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:06 +02:00
Ville Syrjälä
1cfcca66ec tools: Update .gitignore
Ignore intel_watermark and unignore the, now extinct, intel_dpio_{read,write}.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-25 20:32:57 +02:00
Ville Syrjälä
4d2577e0dd tools/intel_watermark: Tool to decode watermark registers
The watermark registers on the gmch platform are a bit of a mess. Add
a tool to make some sense of them. While at it decode the ilk-bdw wm
registers as well. SKL+ is left out for now since it's a very different
beast.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
978881801e tools/intel_iosf_sb_read: Support different register strides
Some IOSF SB units ogranize their registers in a pecualiar way. Even
though the registers are 32 bits wide, the register offsets only
increment by one when going from one register to the next. Correctly
deal with this when dumping several consecutive registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
bd692becf7 tools/intel_iosf_sb_read: Add -c command line option like intel_reg_read
Add a command line option '-c <count>' that can be used to read set of
consecutive registers without having to specify the offset for each of
them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
dcb3edf2a9 tools/intel_iosf_sb_*: Support reading/writing multiple registers at once
Allow the user to specify a list of registers to read, and register/value
pairs to write.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
0461e8cf43 tools/intel_iosf_sb_*: Use getopt() to parse the options
I want to add some command line options so switch to getopt() to make
that easier.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
38e3c58cba tools/intel_iosf_sb_*: Replace if ladder with an array and bsearch()
Replace the silly strcasecmp() if ladder with and array that maps the
unit names to port numbers. And keep the thing sorted so we can do
the lookup with bsearch() for extra speed :)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
29ebc68313 tools: Remove intel_dpio_{read,write} tools
intel_dpio_{read,write} as redundant as intel_iosf_sb_{read,write}
handle the same task.

The difference between the tools was the opcode used to read/write the
registers, but with DPIO both opcodes work just fine, so there's no need
for both sets of tools.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Ville Syrjälä
0129b02c7b toos/intel_iosf_sb_*: Fix DPIO IOSF SB port number
The correct port is 0x12, not 0x13 which is actually GPIO_NC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-24 15:30:20 +02:00
Damien Lespiau
06a9c35664 quick_dump/skl: Add power well registers
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-03-24 11:58:57 +00:00