skl_compute_wrpll: Prefer even dividers

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2015-05-07 18:17:32 +01:00
parent b3ef2986ca
commit cb57cdc632

View File

@ -431,6 +431,13 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */,
dco_freq,
p);
}
/*
* If a solution is found with an even divider, prefer
* this one.
*/
if (d == 0 && ctx.p)
break;
}
}