skl_compute_wrpll: Make sure we respect the DCO frequency constraints

We might as well verify that we have a semblance of all being in order
by making sure the DCO frequency is within the expected bounds.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2015-05-07 16:54:21 +01:00
parent acbcdbd8b7
commit 8d1739dd84

View File

@ -60,6 +60,10 @@ struct skl_wrpll_params {
uint32_t kdiv;
uint32_t pdiv;
uint32_t central_freq;
/* for this test code only */
uint64_t central_freq_hz;
unsigned int p0, p1, p2;
};
static bool
@ -239,6 +243,12 @@ found:
}
/* for this unit test only */
wrpll_params->central_freq_hz = dco_central_freq[min_dco_index];
wrpll_params->p0 = candidate_p0[min_dco_index];
wrpll_params->p1 = candidate_p1[min_dco_index];
wrpll_params->p2 = candidate_p2[min_dco_index];
return true;
}
@ -406,6 +416,7 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */,
};
struct skl_wrpll_context ctx;
unsigned int dco, d, i;
unsigned int p0, p1, p2;
skl_wrpll_context_init(&ctx);
@ -428,6 +439,12 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */,
skl_wrpll_get_multipliers(ctx.p, &p0, &p1, &p2);
/* for this unit test only */
wrpll_params->central_freq_hz = ctx.central_freq;
wrpll_params->p0 = p0;
wrpll_params->p1 = p1;
wrpll_params->p2 = p2;
return true;
}
@ -829,6 +846,31 @@ static void test_run(struct test_ops *test)
clock);
continue;
}
/*
* make sure we respect the +1%/-6% contraint around the
* central frequency
*/
{
unsigned int p = params.p0 * params.p1 * params.p2;
uint64_t dco_freq = (uint64_t)p * clock * 5;
uint64_t central_freq = params.central_freq_hz;
uint64_t deviation;
uint64_t diff;
diff = abs_diff(dco_freq, central_freq);
deviation = div64_u64(10000 * diff, central_freq);
if (dco_freq > central_freq) {
if (deviation > 100)
printf("failed constraint for %dHz "
"deviation=%"PRIu64"\n", clock,
deviation);
} else if (deviation > 600)
printf("failed constraint for %dHz "
"deviation=%"PRIu64"\n", clock,
deviation);
}
}
}