7 Commits

Author SHA1 Message Date
Chris Wilson
4fd34977af test/gem_(cpu|gtt)_concurrent_blit: Move the set_bo() from create to the test
Hiding the initial set_bo() required for the "overwrite-source" tests
lead to a nice bit of hilarity as I missed repeating the initialisation
for the multiple loops of the interruptible version of
"overwrite-source".

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 17:07:51 +01:00
Chris Wilson
4c6f2d4e0c tests/gem_(cpu|gtt)_concurrent_blit: Restore the old tests and add the new interruptible as new tests
Daniel preferred to keep the old tests intact lest we accidentally break
them, and to add the new interruptible tests as new subtests.

In the process also make sure the GPU is idle before starting each loop.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 16:49:05 +01:00
Chris Wilson
95426dc206 tests/gem_(cpu|gtt)_concurrent_blit: Enable signals
In order to exercise the bug behind:

commit 22fd5ca947b58901927d100d2b1aa0f1672b3435
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Jun 28 16:54:08 2013 +0100

    drm/i915: Only clear write-domains after a successful wait-seqno

we need to check for concurrent access with the potential to be
interrupted by a signal. The framework for doing so is already in place,
so just enable it and repeat the tests for longer to give better chance
of being interrupted at just the wrong moment.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 16:37:20 +01:00
Daniel Vetter
4f6ab180a1 tests/gem_cpu_concurrent_blt: convert to subtest infrastructure
Small changes to avoid expensive setup just to print out the subtest
list, and setting up the source buffers such that "early-read" works
without having run "overwrite-soure" right beforehand.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-11-28 12:00:33 +01:00
Daniel Vetter
d9fb72e266 tests: improve concurrent blit tests
By adding another testcase that follows up with a gpu read. This
checks whether the kernel properly tracks the pending write and
doesn't lose it (or sync up to the wrong seqno).

For some odd reason only the cpu mmap variant blows up, the gtt one
works here. I need to look into that some more.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-13 10:35:11 +02:00
Chris Wilson
b78243fc61 test/gem_cpu_concurrent_blit: Limit memory usage to half aperture
So that we don't cause needless thrashing on older devices and spoil the
test.
2012-04-10 19:41:43 +01:00
Chris Wilson
da026d8bfe test: Exercise concurrent GPU read/write with CPU domain access
Designed to exercise this patch to i915.ko:

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fbf1118..57ae1f2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3181,9 +3181,11 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_obj
        if (ret)
                return ret;

-       ret = i915_gem_object_wait_rendering(obj);
-       if (ret)
-               return ret;
+       if (write || obj->pending_gpu_write) {
+               ret = i915_gem_object_wait_rendering(obj);
+               if (ret)
+                       return ret;
+       }

        i915_gem_object_flush_gtt_write_domain(obj);

By exercising the conditions whereby should either of the checks be missed
an error is detected.
2012-04-10 19:35:29 +01:00