18 Commits

Author SHA1 Message Date
Xiang, Haihao
27050395d2 Support DP for sampler/render/constant/data cache
Since Sandybridge, DP supports cache select for read/write. Some write messages such as
OWord Block Write don't support render cache any more on Ivybridge. So introduce a
generic data_port messsage for Sandybridge+.

    data_port(
        cache_type,   /* sampler, render, constant or data(on Ivybridge+) cache */
        message_type, /* read or write type */
        message_control,
        binding_table_index,
        write_commit_or_category, /* write commit on Sandybridge, category on Ivybridge+ */
        header_present)

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:29 +00:00
Zhou Chang
52399867bf Add VME support in SEND 2013-03-04 15:54:28 +00:00
Xiang, Haihao
27b4303a30 Support instructions which strictly follow the documents.
Previously some instructions parsed by this assembler don't follow the
documents.

Signed-off-by: Chen, Yangyang <yangyang.chen@intel.com>
Signed-off-by: Han, Haofu     <haofu.han@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:28 +00:00
Chen, Yangyang
bf06f07d5b fix CHANNEL select
Signed-off-by: Chen, Yangyang <yangyang.chen@intel.com>
Signed-off-by: Han, Haofu     <haofu.han@intel.com>
2013-03-04 15:54:28 +00:00
Xiang, Haihao
5405532ffc add support for math instruction on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:28 +00:00
Xiang, Haihao
f1f5208e1e add support for plane instruction (pln)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:28 +00:00
Xiang, Haihao
55d81c4ce7 add AccWrCtrl flag on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-04 15:54:27 +00:00
Zou Nan hai
c6f2da4e82 1. type syntax :ud :uw etc
2. empty instruction option
3. remove a conflict
2013-03-04 15:54:26 +00:00
Zou Nan hai
5608d2765d support simple expression 2013-03-04 15:54:26 +00:00
Zou Nanhai
be9bcee15f Add support for labeled and conditional branches
Signed-off-by: Keith Packard <keithp@keithp.com>
2013-03-04 15:54:26 +00:00
Eric Anholt
d866fff116 Fix compiler warning from missing include. 2013-03-04 15:54:26 +00:00
Keith Packard
2033aea3dd Add conditional support to assembler. Add align16 dest support to disasm.
This is working towards round-tripping mesa programs. Still need indirect
register addressing and align16 source support.
2013-03-04 15:54:26 +00:00
Keith Packard
082fbe8738 Support #line directives 2013-03-04 15:54:25 +00:00
Keith Packard
2d4d401d70 Add packed vector immediate values 2013-03-04 15:54:25 +00:00
Eric Anholt
a6d95cc0ce Use 0 instead of INITIAL, as the chosen lex on my debian doesn't supply it. 2013-03-04 15:54:25 +00:00
Eric Anholt
d1b8791928 Lex integers as unsigned long instead of signed int, fixing the immediate test. 2013-03-04 15:54:24 +00:00
Eric Anholt
892d6e7ed0 Fix copy'n'paste-o in lexing of the WHILE instruction. 2013-03-04 15:54:24 +00:00
Eric Anholt
9b40c3724a Add autotools build system, and rearrange directory layout. 2013-03-04 15:54:23 +00:00