When no display is connected all kms_plane subtests pass although
no testing is done.
Change it by reporting the subtests as skipped.
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
One property lost in the expansion for various coherency checks was
ensuring that every time we overwrote the batch it had a unique value
(to ensure that the GPU was seeing the latest value).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Look at handling of multiple batches within the buffer and avoiding as
much synchronisation as possible.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
pipe_crc in data_t is assigned an allocated memory space and
then later free'd. But it is never used for any comparisons.
It should therefore be safe to remove pipe_crc and the crc
requirement.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
We can simply sscanf the crc in one go. Also split up the igt asserts to
get better details about what went wrong.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
When using the kernel set-domain cache management, we need to set the
domain as appropriate for our pointer access. In this case we access the
buffer through a CPU mmap, and so we must request access via the CPU
domain.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When looking at a pair of GPU writes, where we want to make sure that
the clean cacheline is invalidated automatically, we want to reuse that
cacheline whilst we know it remains valid (i.e. repeat the test using a
new value to the same location).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Since the value in the bo may be altered by the test, we only want to
repeat phases of the test to avoid breaking the test itself.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Alternate between two values written by the GPU so that we can look for
stale cachelines without having to overwrite the value with the CPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
A basic check that the execbuf flushes writes from the batch and that
they are coherent afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
igt_fork_hang_detector() was called from a igt_fixture block, while its
counterpart (igt_stop_hang_detector) was called normally, causing
SIGTERM to be sent when running under check target.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
So that this test can be run in drivers other than i915.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Series-version: 1
Series-to: intel-gfx
Series-cc: padovan, daniels, marcheu, seanpaul, xexaxo, fedkem, mvlad, danvet
Series-prefix: i-g-t
Cover-letter:
Make more tests generic
Hi,
these patches allow a few more tests to run on drivers other than i915,
mainly by removing the last usage of
DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID and removing superfluous dependencies
on bufmgr and tiled BOs.
Thanks,
Tomeu
END
As the test doesn't actually need tiled BOs, drop the tiled formats so
the test can run on drivers other than i915.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Because bufmgr is currently a i915-only thing and it's only needed in a
subset of the subtests, require it only in the subtests that actually
need it so that the other subtests aren't skipped without a reason.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Because attempts to create a tiled BO will cause a igt_require call to
fail on drivers that don't support tiling, do so in the subtest that
actually needs it so that other subtests aren't skipped without reason.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Batchbuffers are only needed in the subtest that does the blit on the
GPU, so move that dependency into it so the other subtest can be ran on
!i915.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
So the test runs on other drivers, drop the usage of the i915-specific
DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID ioctl.
Wait for a vblank event on pipe0 and if we get it, then the test can
proceed (code copied from kms_vblank).
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Seems like an overkill for a basic test to keep flipping for
a full minute. Dial it down a bit.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
The stack of batchbuffers is myth. In general there are only 2 levels of
stack for HEAD (ringbuffer, batchbuffer) and chaining up the batch
buffer just updates the lowest level of the stack. A BATCH_BUFFER_END at
any depth then returns to the ring.
So be creative and modify the batch buffer on the fly...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Rather than create a new scratch buffer every pass, import the original
as this provides stress upon less commonly trod paths (i.e. handling
objects with many vma) as well as many objects in general.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Emulate the behaviour of the second thread killing fd at random by
having a signal fire at a random time instead. Only one thread and so we
do not have the issue of accessing another valid handle on another fd
and so executing a blank buffer - triggering GPU hangs.
References: https://bugs.freedesktop.org/show_bug.cgi?id=95048
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Feceoru, Gabriel