The rest of igt has moved to kernel coding style. People had already
been not conforming with the existing formatting in error decode, so we
may as well fix it.
This addresses two primary issues, tabbing (remove spaces), and space
after function in function call. I may have missed some of the latter
since that was done by hand.
I have upcoming work in this file, and it was annoying me.
v2: Fix case alignment (Chris)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Also add a subtest for the fd=handle_to_fd(), fd2=dup(fd), close(fd)
case (idea from Kristian Høgsberg).
Signed-off-by: Imre Deak <imre.deak@intel.com>
v2:
- add a new subtest instead of modifying the original test (Daniel)
- add a new subtest for testing dup (Kristian)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The sample usage is in reg_access.dpio_read(). We should add some
semantics to the text files to detect DPIO registers, and do the right
thing.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
With the introduction of the forcewake dance:
commit cac8f8b52621f246a7cff412f340a7db28cb1b99
Author: Ben Widawsky <ben@bwidawsk.net>
Date: Thu Jul 28 13:40:19 2011 -0700
forcewake: Add mmio code to do proper forcewake stuff for gen6
We lost the ability to do register access when either debugfs isn't
mounted, or when the driver isn't loaded. The latter can be beneficial
in debugging situations.
This patch will allow the driver to still do mmio (leaving forcewake
management up to the callers) provided that the i915 driver appears to
not be loaded (according to sysfs)
Requested by Jesse.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Make sure the kernel returns EDEADLK when the number of fences is
exceeded for gen2-3. For gen4+ the test makes sure the kernel ignores
the EXEC_OBJECT_NEEDS_FENCE flag.
Note that I changed the code not to round the num_fences to an even
number. Not sure why that was there, and if there's a reason for it,
we need to add it back.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Make sure that debugfs entry works as expected by reading
back the sequence number that was written.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
gem_tiling_max_stride writes a data pattern to an X-tiled buffer using
the maximum supported stride, reads the data back as linear, and
verifies that the data didn't get scrambled on the way.
The test also checks that some invalid stride values are rejected
properly.
v2: Check invalid strides
v3: Check invalid stride with Y-tiling
Include a few more invalid stride values
Fix gen3 X-tile size
v4: A few more invalid strides :)
Drop the useless memset()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
lib/drmtest.c provides gem_available_fences(). Use it where
appropriate.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
IVB+ supports 32 fence registers, bump the maximum in the test.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
With this at least the y-tiled test reliably fails on my machines, but
x-tiled still passes on some. More ideas to tune this highly welcome.
v2: Fill cpu caches with data for each newly allocated bo. This seems
to do the trick on my snb here _really_ reliably. So apparently the
backsnoop for llc gtt writes is the crucial ingredient here to make
the test fail.
While at it, also stop leaking mmap space.
v3: Fixup commit message.
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
We need to clear out the error_state. While at it also make sure that
the hang was indeed detected.
Whoever writes the next test to race against gpu hangs should probably
extract these two functions into the drmtest library. Which just one
user that's not really worth it right now.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This wreaked havoc with intel_reg_dumper since it's been broken in
commit c6fe31bc473a7ae44bc42bad7da5faca3c924821
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Thu Jun 21 14:31:34 2012 -0300
intel_reg_dumper: use intel_register_access_init/fini
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
While the Sandybridge PRM doesn't have any documentation on the GPU's
performance counters, a lot of information can be gleaned from the older
Ironlake PRM. Oddly, none of the information documented there actually
appears to apply to Ironlake. However, it apparently works just great
on Sandybridge.
Since this information has all been publicly available on the internet
for around three years, we can use it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
We want to support this tool on more platforms. This lays the
groundwork for making that possible.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This reads the GPU's performance counters via MI_REPORT_PERF_COUNT and
prints them in a top-style interface. While it can be useful in and of
itself, it also documents the performance counters and lets us verify
that they're working.
Currently, it only supports Ironlake.
v2 [Ken]: Rebase on master and fix compilation failures; make it abort
on non-Ironlake platforms to avoid GPU hangs; rename from 'chaps' to
intel_perf_counters since that acronym isn't used any longer; write the
above commit message.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Add write-verify test to gem_fence_thrash. Test will create
multiple threads per fence then verify the write into fenced region.
v2: non-threaded, non-tiled tests added. suggested by Chris Wilson.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
It was previously printing ironlake_debug_regs and haswell_debug_regs.
Since ironlake_debug_regs contains a lot of registers that don't exist
on Haswell, running intel_reg_dumper on Haswell caused "unclaimed
register" messages. Now I've copied the existing registers from
ironlake_debug_regs to haswell_debug_regs, so we won't print the
registers that don't exist anymore.
Also removed DP_TP_STATUS_A since it doesn't exist.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
This adds a test to make sure that the execbuffer validation routine is
checking for invalid addresses, single entry overflow, and multi-entry
wrapping overflow.
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
flip-vs-bad-tiling tests that page flipping to a Y-tiled buffer returns
an error correctly, rather than triggering kernel BUG for instance.
Create a third fb for this purpose. After the fb has been created,
change its tiling mode to Y. When performing a flip, target this
Y-tiled fb and make sure we get the expected error value.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The flip-vs-panning-vs-hang is just like the regular flip-vs-panning
test, except it also hangs the GPU. This will test whether panning
works after a pending page flip has been cancelled by a GPU reset,
and also whether page flip events get delivered correctly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Do not use the TEST_HANG flag to determine whether page flip events are
used. Add a new TEST_NOEVENT flag that can be used to disable the use
of events instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
So when making changes in code using that function, we get warnings
about mismatches between the format string and arguments.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
dest_horizontal_stride needs go through the horiz_stride[] indirection
to pick up the rigth stride when its value is 11b (4 elements).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \
-e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \
-e 's/GLshort/int16_t/g' assembler/*.[ch]
Drop the GL types here, they don't bring anything to the table. For
instance, GLuint has no guarantee to be 32 bits, so it does not make too
much sense to use it in structure describing hardware tables and
opcodes.
Of course, some bikeshedding can be applied to use uin32_t instead, I
figured that some of the GLuint are used without size constraints, so
a sed with uint32_t did not seem the right thing to do. On top of that
initial sed, one bothered enough could change the structures with size
constraints to actually use uint32_t.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
