mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-10 09:26:10 +00:00
intel_reg_dumper: dump HSW watermark registers
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
This commit is contained in:
parent
eb88ce64b7
commit
051e327247
@ -3752,6 +3752,18 @@ typedef enum {
|
||||
#define LCPLL_CD2X_CLOCK_DISABLE (1<<23)
|
||||
|
||||
/* Pipe WM_LINETIME - watermark line time */
|
||||
#define WM_PIPE_A 0x45100
|
||||
#define WM_PIPE_B 0x45104
|
||||
#define WM_PIPE_C 0x45200
|
||||
#define WM_LP1 0x45108
|
||||
#define WM_LP2 0x4510C
|
||||
#define WM_LP3 0x45110
|
||||
#define WM_LP1_SPR 0x45120
|
||||
#define WM_LP2_SPR 0x45124
|
||||
#define WM_LP3_SPR 0x45128
|
||||
#define WM_MISC 0x45260
|
||||
#define WM_SR_CNT 0x45264
|
||||
#define WM_DBG 0x45270
|
||||
#define PIPE_WM_LINETIME_A 0x45270
|
||||
#define PIPE_WM_LINETIME_B 0x45274
|
||||
#define PIPE_WM_LINETIME_C 0x45278
|
||||
|
@ -1783,6 +1783,18 @@ DEBUGSTRING(hsw_debug_pipe_ddi_func_ctl)
|
||||
port, mode, bpc, vsync, hsync, edp_input, width);
|
||||
}
|
||||
|
||||
DEBUGSTRING(hsw_debug_wm_pipe)
|
||||
{
|
||||
uint32_t primary, sprite, cursor;
|
||||
|
||||
primary = (val >> 16) & 0x7F;
|
||||
sprite = (val >> 8) & 0x7F;
|
||||
cursor = val & 0x3F;
|
||||
|
||||
snprintf(result, len, "primary %d, sprite %d, pipe %d", primary,
|
||||
sprite, cursor);
|
||||
}
|
||||
|
||||
static struct reg_debug ironlake_debug_regs[] = {
|
||||
DEFINEREG(PGETBL_CTL),
|
||||
DEFINEREG(GEN6_INSTDONE_1),
|
||||
@ -2101,10 +2113,22 @@ static struct reg_debug haswell_debug_regs[] = {
|
||||
DEFINEREG2(PIPE_CLK_SEL_B, hsw_debug_pipe_clk_sel),
|
||||
DEFINEREG2(PIPE_CLK_SEL_C, hsw_debug_pipe_clk_sel),
|
||||
|
||||
/* Pipe line time */
|
||||
/* Watermarks */
|
||||
DEFINEREG2(WM_PIPE_A, hsw_debug_wm_pipe),
|
||||
DEFINEREG2(WM_PIPE_B, hsw_debug_wm_pipe),
|
||||
DEFINEREG2(WM_PIPE_C, hsw_debug_wm_pipe),
|
||||
DEFINEREG(WM_LP1),
|
||||
DEFINEREG(WM_LP2),
|
||||
DEFINEREG(WM_LP3),
|
||||
DEFINEREG(WM_LP1_SPR),
|
||||
DEFINEREG(WM_LP2_SPR),
|
||||
DEFINEREG(WM_LP3_SPR),
|
||||
DEFINEREG(WM_MISC),
|
||||
DEFINEREG(WM_SR_CNT),
|
||||
DEFINEREG(PIPE_WM_LINETIME_A),
|
||||
DEFINEREG(PIPE_WM_LINETIME_B),
|
||||
DEFINEREG(PIPE_WM_LINETIME_C),
|
||||
DEFINEREG(WM_DBG),
|
||||
|
||||
/* Fuses */
|
||||
DEFINEREG2(SFUSE_STRAP, hsw_debug_sfuse_strap),
|
||||
|
Loading…
x
Reference in New Issue
Block a user