44 Commits

Author SHA1 Message Date
Chris Wilson
bb35716d25 intel_error_decode: Update address parsing for 64bit offsets
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-12-31 22:10:11 +00:00
Chris Wilson
8f9df28a82 intel_error_decode: Fix decode headers for HW context
As we didn't recognise the different buffer type, we confused it with
whatever we last decoded (i.e. the render ring buffer).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-12-31 22:10:11 +00:00
Chris Wilson
d4c3cd4d04 intel_error_decode: Inflate compressed error state
Recent kernels compress the active objects using zlib + ascii85
encoding. This adapts the tool to decompress those inplace.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-12-31 22:10:11 +00:00
Chris Wilson
70ee508421 lib: Make instdone initialisation fail gracefully
Just report that we don't recognise the chipset rather than explode.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-11-09 16:57:22 +00:00
Mika Kuoppala
559987fc01 tools/intel_error_decode: Add gen8+ fault data encodings
These two registers contains the 48bit fault address.

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:34 +02:00
Mika Kuoppala
f96bfb8e8c tools/intel_error_decode: Add decodings for FAULT_REG
Add decodings for FAULT_REG

v2: fix fault encodings and ignore addr type for gen8+ (Michel)
    fix engine mask

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:18 +02:00
Mika Kuoppala
0a2ef9c349 tools/intel_error_decode: Add ERROR decodings for gen8
Add ERROR decodings for gen8

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
2015-03-26 10:00:06 +02:00
Chris Wilson
b64704673e intel_error_decode: Decode the ERROR register on Sandybridge and Ivybridge
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-12-05 11:28:04 +00:00
Zhao Yakui
f04bf00c0d rendercopy/skl: Pass the context to rendercopy function on SKL
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2014-09-30 12:21:02 +01:00
Daniel Vetter
c03c6ceb29 lib: rename intel_gpu_tools.h to intel_io.h
With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 21:34:29 +01:00
Daniel Vetter
6cfcd71589 lib: remove uncessary #includes from headers
Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.

One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 20:08:13 +01:00
Chris Wilson
b5109e62ce intel_error_decode: Protect against missing ring registers
A dodgy kernel may miss printing out the ring registers leading to a
FPE.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-01-23 21:51:57 +00:00
Damien Lespiau
d8b1dee220 intel_reg: Renamed INST_DONE to INSTDONE
That's how the registers are named in the kernel defines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-01-07 16:47:33 +00:00
Damien Lespiau
1d2ef9553a intel_error_decode: Factor out common decoding code
4 pieces of code were looking very similar. Let's factor out a common
function in the not so unlikely case we need to tweak that code.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-01-06 13:40:21 +00:00
Chris Wilson
58ac17d821 intel_error_decode: Fix X/Y fence for gen2/3 2013-10-21 09:32:34 +01:00
Chris Wilson
dbbf2e9b24 intel_error_decode: First try /sys/drm/card0/error for the error-state
As the sysfs is almost always mounted and readable, we have a higher
success rate checking for our error state there than in debugfs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-08-07 23:43:25 +01:00
Mika Kuoppala
edee952e6a tools/inter_error_decode: decode for ctl and acthd
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-07-16 15:18:56 +02:00
Ben Widawsky
afeb43190e intel_error_decode: HEAD stuff
Show the decoded HEAD value, as well as print the calculated head offset
per ringbuffer.

This will be superceded in the next commit, but that patch is way more
complicated than this one (read: error prone), so I want this here.

Example:
ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950

v2: Actually make it work for all rings.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:55 -07:00
Ben Widawsky
155aa1e1fa intel_error_decode: Whitespacing fix
The rest of igt has moved to kernel coding style. People had already
been not conforming with the existing formatting in error decode, so we
may as well fix it.

This addresses two primary issues, tabbing (remove spaces), and space
after function in function call. I may have missed some of the latter
since that was done by hand.

I have upcoming work in this file, and it was annoying me.

v2: Fix case alignment (Chris)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:45 -07:00
Chris Wilson
f9c8e365e9 intel_error_decode: Don't barf on a malformed PCI ID line
Whoops, someone added UTS_RELEASE with no newline before PCI ID which
upsets our naive parser.
2013-02-04 21:42:21 +00:00
Imre Deak
5efd3d3d22 fix warn in intel_error_decode: ignoring return value of 'asprintf'
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-10-10 15:59:05 +02:00
Chris Wilson
412e7b341f intel_error_decode: Be more lax for whitespace around parsing PCI-ID
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-05-09 13:50:53 +01:00
Chris Wilson
bf6c480d6d decode: Use the correct start mask for gen3 fence registers
A cut'n'paste error from gen2 apparently.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-03-19 14:24:22 +00:00
Daniel Vetter
ca10c7231d intel_error_decode: fixup glibc free warning
Usually some random stack garbage doesn't equal some other
random stack garbage, leading to the filename != path check
succeeding.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-24 21:41:17 +01:00
Daniel Vetter
391e6aa89a tools/intel_error_decode: fixup new warnings
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-09 23:38:28 +01:00
Daniel Vetter
7ee9f16e51 tools/intel_error_decode: convert over to libdrm decoder
Note that a per-ring error decode state would make more sense - this
way we could better decode the ring head and tail. But our current
head tracking is already lame (we need the kernel to also dump the
ringbuffer head/tail first, not just acthd), so I didn't bother.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-09 23:38:17 +01:00
Daniel Vetter
d510953ef3 tools/intel_error_decode: decode gen4+ fences
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-21 19:06:08 +02:00
Daniel Vetter
5801e6b911 intel/decode: print out chipset gen
... instead of i965+ for almost everything that Intel is still selling.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18 16:30:56 +02:00
Daniel Vetter
92b1f2c96e tools/decode: don't move around the display register section
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18 15:54:31 +02:00
Daniel Vetter
6ed89f47ec tools/decode: don't forget to print the name of the last ring
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18 15:49:41 +02:00
Daniel Vetter
73c2104070 tools/decode: retain the ring name
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-17 13:46:46 +02:00
Daniel Vetter
cf5db1161a Decode gen2/gen3 fences in the error_state
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-03-14 11:20:17 +01:00
Chris Wilson
41570d9bf5 Remove confusing use of IS_9XX
... and test for what we mean instead.

Reported-by: Diego Celix <dcelix@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-14 15:57:40 +00:00
Chris Wilson
68a95f0e38 error decode: Search for first i915_error_state
Handy for multi-GPU systems where the IGFX may not be first.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-01 13:37:56 +00:00
Chris Wilson
98eb5a5e24 error: Parse ring name before gtt_offset
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-09 13:27:22 +00:00
Chris Wilson
4f20844247 error decode: print out class of chipset in the error report
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-23 19:44:14 +00:00
Chris Wilson
292ae4538a error-decode: stdin is 0 not 1
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-10 15:31:59 +00:00
Chris Wilson
a3a78632bd error-decode: Operate as a pipe and accept input from stdin
Useful for feeding in compressed files from bugzilla:

$ bzcat /tmp/i915_error_state.bz | intel_error_decode | less

Next step would be to use gzfopen or bzfopen to automagically handle
compressed files...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-01 21:51:59 +00:00
Chris Wilson
8934395d9d Decode PGTBL_ER for i965
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-22 11:33:08 +01:00
Chris Wilson
14618620cc decode: Handle errors during parsing.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-25 12:00:05 +01:00
Chris Wilson
2d1ad95423 error: Decode i915 PGTBL errors
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-07-15 19:33:00 +01:00
Chris Wilson
95374225e8 Enable compilation on non-Intel, non-DRM systems.
A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-04-08 12:17:31 +01:00
Chris Wilson
bfc2b5306f intel_error_decode: Pretty print i830 PGTBL_ER
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-04 21:56:35 +00:00
Chris Wilson
9eb4de10a1 Add intel_error_decode.
A simple variant of intel_gpu_dump that explicitly handles parsing of
i915_error_state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-12 13:35:14 +00:00