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intel_reg: Renamed INST_DONE to INSTDONE

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That's how the registers are named in the kernel defines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-06-04 05:41:36 +01:00
parent 98c10d379b
commit d8b1dee220
5 changed files with 12 additions and 12 deletions
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6
lib/instdone.c
View File

@ -46,19 +46,19 @@ add_instdone_bit(uint32_t reg, uint32_t bit, const char *name)
static void
gen3_instdone_bit(uint32_t bit, const char *name)
{
add_instdone_bit(INST_DONE, bit, name);
add_instdone_bit(INSTDONE, bit, name);
}
static void
gen4_instdone_bit(uint32_t bit, const char *name)
{
add_instdone_bit(INST_DONE_I965, bit, name);
add_instdone_bit(INSTDONE_I965, bit, name);
}
static void
gen4_instdone1_bit(uint32_t bit, const char *name)
{
add_instdone_bit(INST_DONE_1, bit, name);
add_instdone_bit(INSTDONE_1, bit, name);
}
static void

6
lib/intel_reg.h
View File

@ -370,7 +370,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define IPEIR 0x2088
#define IPEHR 0x208C
#define INST_DONE 0x2090
#define INSTDONE 0x2090
# define IDCT_DONE (1 << 30)
# define IQ_DONE (1 << 29)
# define PR_DONE (1 << 28)
@ -434,7 +434,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define INST_PS 0x20c4
#define IPEIR_I965 0x2064 /* i965 */
#define IPEHR_I965 0x2068 /* i965 */
#define INST_DONE_I965 0x206c
#define INSTDONE_I965 0x206c
# define I965_ROW_0_EU_0_DONE (1 << 31)
# define I965_ROW_0_EU_1_DONE (1 << 30)
# define I965_ROW_0_EU_2_DONE (1 << 29)
@ -541,7 +541,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define DMA_FADD_P 0x2078
#define DMA_FADD_S 0x20d4
#define INST_DONE_1 0x207c
#define INSTDONE_1 0x207c
# define I965_GW_CS_DONE_CR (1 << 19)
# define I965_SVSM_CS_DONE_CR (1 << 18)
# define I965_SVDW_CS_DONE_CR (1 << 17)

2
tools/intel_error_decode.c
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@ -102,7 +102,7 @@ print_instdone(uint32_t devid, unsigned int instdone, unsigned int instdone1)
for (i = 0; i < num_instdone_bits; i++) {
int busy = 0;
if (instdone_bits[i].reg == INST_DONE_1) {
if (instdone_bits[i].reg == INSTDONE_1) {
if (!(instdone1 & instdone_bits[i].bit))
busy = 1;
} else {

8
tools/intel_gpu_top.c
View File

@ -144,7 +144,7 @@ update_idle_bit(struct top_bit *top_bit)
{
uint32_t reg_val;
if (top_bit->bit->reg == INST_DONE_1)
if (top_bit->bit->reg == INSTDONE_1)
reg_val = instdone1;
else
reg_val = instdone;
@ -559,10 +559,10 @@ int main(int argc, char **argv)
long long interval;
ti = gettime();
if (IS_965(devid)) {
instdone = INREG(INST_DONE_I965);
instdone1 = INREG(INST_DONE_1);
instdone = INREG(INSTDONE_I965);
instdone1 = INREG(INSTDONE_1);
} else
instdone = INREG(INST_DONE);
instdone = INREG(INSTDONE);
for (j = 0; j < num_instdone_bits; j++)
update_idle_bit(&top_bits[j]);

2
tools/intel_reg_dumper.c
View File

@ -2476,7 +2476,7 @@ static struct reg_debug i945gm_mi_regs[] = {
DEFINEREG(HWS_PGA),
DEFINEREG(IPEIR),
DEFINEREG(IPEHR),
DEFINEREG(INST_DONE),
DEFINEREG(INSTDONE),
DEFINEREG(NOP_ID),
DEFINEREG(HWSTAM),
DEFINEREG(SCPD0),