526 Commits

Author SHA1 Message Date
Ben Widawsky
799aeb6d00 intel_l3_parity: Support a daemonic mode
v2: Add a comment explaining the dangers of directly accessing the DFT
register (Daniel)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
bfa7a5906d intel_l3_parity: Support error injection
Haswell added the ability to inject errors which is extremely useful for
testing. Add two arguments to the tool to inject, and uninject.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
5f95ea780b intel_l3_parity: Actually support multiple slices
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
8ddcfd6882 intel_l3_parity: slice support
Haswell GT3 adds a new slice which is kept distinct from the old
register interface. Plumb it into the code, though it's only 1 slice
still.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
48d1b362c5 intel_l3_parity: Hardware info argument
Add a new command line argument to the tool which will spit out various
parameters for the giving hardware. As a result of this, some new
defines are added to help with the various info.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
a9cd76b36e intel_l3_parity: Use getopt for the l3 parity tool
Add new command line arguments in addition to supporting the old
features. This patch only introduces one feature, the -e argument to
enable a specific row/bank/subbank. Previously you could only enable
all. Otherwise, it has what you expect (we prefer -r -b -s for
specifying the row/bank/subbank).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
e740bdf5bd intel_l3_parity: Assert all GEN7+ support
v2: Don't assert for Valleyview (Bryan)
Rework code to be a bit more readable.

CC: "Bell, Bryan J" <bryan.j.bell@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Ben Widawsky
318c0b22d7 intel_l3_parity: Fix indentation
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-20 09:42:07 -07:00
Mengdong Lin
deba868066 intel_audio_dump/hsw: rename some audio configuration registers for Haswell
For Haswell, some audio configuration registers have changed their name and
some bit definitions.

This patch applies the changes, and uses subfunctions to parse registers for
code reuse.

Here is the name change list:
Audio configuration: AUD_CONFIG_x to AUD_TCx_CONFIG
Audio Misc Control: AUD_MISC_CTRL_x to AUD_Cn_MISC_CTRL
Audio M & CTS programming enable: AUD_CTS_ENABLE_x to AUD_TCx_M_CTS_ENABLE
Audio EDID data block: AUD_HDMIW_HDMIEDID_x to AUD_TCx_EDID_DATA
Audio Widget Data Island Packet: AUD_HDMIW_INFOFR_x to AUD_TCx_AUD_INFOFR
Audio Pipe and Converter Configs: AUD_PORT_EN_HD_CFG to AUD_PIPE_CONV_CFG
Audio Digital Converter: AUD_OUT_DIG_CNVT_x to AUD_Cn_DIG_CNVT
Audio Stream Descriptor Format: AUD_OUT_STR_DESC_x to AUD_Cn_STR_DESC
Audio Connect List Entry & Length:  AUD_PINW_CONNLNG_LIST_x to
                                        AUD_TCx_PIN_PIPE_CONN_ENTRY_LNGTH
Audio Connection Select Control: AUD_PINW_CONNLNG_SEL to AUD_PIPE_CONN_SEL_CTRL
Audio DIP & ELD Control State: AUD_DIP_ELD_CTRL_ST_x to AUD_TCx_DIP_ELD_CTRL_ST
Audio HDMI FIFO status: AUD_HDMIW_STATUS to AUD_HDMI_FIFO_STATUS

NOTE:
For Tx, x = A/B/C, meaning Transcoder A/B/C.
For Cn, n = 1/2/3, meaning audio converter 1/2/3.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2013-09-16 14:20:28 -07:00
Mengdong Lin
3c7dc5cf32 intel_audio_dump/hsw: align code with tab
This patch makes the file to follow kernel coding style:
- replace leading spaces with tabs for alignment
- fix some minor format issues

But the max length of a line is set to 120 characters for readability
on high resolution displays.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2013-09-16 14:20:28 -07:00
Mengdong Lin
cac586586d intel_audio_dump/hsw: remove misuse of PCH transcoder configuration register
The PCH transcoder config register (PCH_TRANS_CONF, 0xf0008) is not the
correct config register for transcoder A, B or C. This register is in
PCH and for CRT display, nothing to do with display audio.

So This patch removes misuse of it as config register for transcoder A/B/C.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2013-09-16 14:20:28 -07:00
Ben Widawsky
612252f3f9 intel_gtt: Raw PTE dumper mode
./tools/intel_gtt -d | head
GTT offset |                 PTEs
--------------------------------------------------------
  0x000000 | 0xe4005015 0xe2854015 0xe283e015 0xe283f015
  0x004000 | 0xe28ba015 0xe28bb015 0xe28b6015 0xe28b7015
  0x008000 | 0xe2828015 0xe2829015 0xe282a015 0xe282b015
  0x00c000 | 0xe2928015 0xe2929015 0xe292a015 0xe292b015
  0x010000 | 0xe2918015 0xe2919015 0xe291a015 0xe291b015
  0x014000 | 0xe291c015 0xe291d015 0xe291e015 0xe291f015
  0x018000 | 0xe2920015 0xe2921015 0xe2922015 0xe2923015
  0x01c000 | 0xe2924015 0xe2925015 0xe2926015 0xe2927015

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-03 15:31:14 -07:00
Ben Widawsky
c6f9bdc66f intel_gtt: Properly support gen6+ GTT PTEs
This finishes the objective in the last patch which was to actually deal
with physical addresses, and not the PTEs.

GEN6+ Provided support for physical addresses above 4GB. I'm not
actually sure what Ironlake supported, and don't feel like firing up the
timemachine.

v2: Add support for gen4, gen5, and haswell.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-03 15:31:14 -07:00
Ben Widawsky
8adfb5886d intel_gtt: Use function to get the physical address
The GTT PTEs that the tool is trying to compare is really about
addresses, and not the PTE itself. To accomplish this, make which
calculates the physical address we actually want.

This commit itself doesn't change any functionality; just the wording in
the code.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-03 15:31:14 -07:00
Ben Widawsky
c42f344b78 intel_reg_dumper: Silence GCC for uninitialized clock
GCC 4.8.1 seems to think clock may be uninitialized.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-09-03 15:31:14 -07:00
Damien Lespiau
a7aaf85ac0 gitignore: Add a couple of recent binaries to .gitignore files
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:56:54 +01:00
Damien Lespiau
84beb3a2a6 quick_dump: Use AM_V_GEN when generating the bindings
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 18:55:16 +01:00
Damien Lespiau
5b791671ad intel_infoframes: Be future-proof about showing 3D_Ext_Data
As Ville noted, future 3D_Struct must also send 3D_Ext_Data in the
vendor infoframe.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-20 14:20:06 +01:00
Mengdong Lin
34198b801e quick_dump/bdw: use hex() to convert devid to hex string in error message
This patch is to avoid the error on device auto-detection failure
"TypeError: Can't convert 'int' object to str implicitly".

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
2013-08-19 10:14:01 -07:00
Daniel Vetter
5951ffb6a0 lib/drmtest: rip out drm_open_any_master
It's unused. Also most of our tests failed to ask for the right type
of drm fd anyway. So it's imo better to just let them fall over when
they don't get master but want it, like they already do today.

This also allows us to garbage-collect the master parameter to
drm_get_card and associated code.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-08-19 10:34:34 +02:00
Ben Widawsky
7df9caeea1 quick_dump: add is_haswell()
This was missed beforehand.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-08-16 14:54:36 -07:00
Damien Lespiau
92aca3b19e intel_infoframes: Dump 3D_Ext_Data when using Side-by-side (half)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-08-15 16:40:47 +01:00
Damien Lespiau
bc1cf77534 intel_infoframes: Add support for decoding HDMI VICs
The HDMI vendor infoframe can contain a HDMI VIC (as of HDMI 1.4, only
used for 4k formats).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
2013-08-15 16:40:02 +01:00
Chris Wilson
176011eea7 Add intel_framebuffer_dump
A simple utility to capture the currently active framebuffers and record
them as a png.
2013-08-15 10:58:31 +01:00
Chris Wilson
dbbf2e9b24 intel_error_decode: First try /sys/drm/card0/error for the error-state
As the sysfs is almost always mounted and readable, we have a higher
success rate checking for our error state there than in debugfs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-08-07 23:43:25 +01:00
Mika Kuoppala
edee952e6a tools/inter_error_decode: decode for ctl and acthd
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-07-16 15:18:56 +02:00
Daniel Vetter
9ee41661de tools/quickdump: gitignore generated files
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-07-10 15:35:13 +02:00
Daniel Vetter
037847a102 tools/intel_reg_dumper: fix up END register
I'm full of fail ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-07-09 23:04:20 +02:00
Daniel Vetter
d3221334d2 tools/intel_reg_dumper: add gen6+ fences
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-07-09 10:46:09 +02:00
Paulo Zanoni
a7e7d08513 intel_reg_dumper: enable the power well
The intel_reg_dumper tool reads a lot of display registers. If we
don't turn on the power well, dmesg will get flooded with tons of
messages about unclaimed registers. So here we enable the "Debug"
power well register and then restore its state later. It's impossible
to guarantee that other things won't mess with the debug register
between our put and get calls, but at least we're trying our best to
keep things working fine, and it's the debug register anyway.

As far as I know, nothing else uses the Debug register for anything,
so we should be safe for now.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-07-03 14:49:09 -03:00
Paulo Zanoni
c013bb02e6 intel_reg_dumper: add hsw_debug_lp_wm
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-07-03 14:49:09 -03:00
Ville Syrjälä
b84b9e230c quick_dump: Add VLV DPIO registers
Add the names of all VLV DPIO registers.

v2: Use the third element to signal DPIO registers, and split
    the code changes to a separate patch

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-06-30 22:06:40 -07:00
Ville Syrjälä
e87c2536f6 quick_dump: Document the register definition format
Add a small comment about what the elements in the register
tuple mean.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-06-30 22:06:38 -07:00
Ville Syrjälä
de92969a40 quick_dump: Add automagic DPIO register support
Repurpose the (currently unused) third element in the register
definition tuple to indicate the type of the register. 'DPIO'
is the only special register type for now.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-06-30 22:06:35 -07:00
Jani Nikula
5bb0897f73 quick_dump: vlv mipi dsi register support
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-06-07 11:35:27 -07:00
Ben Widawsky
55876338fa quick_dump: fix text file
I accidentally pushed
commit a08d62257dbdc8f4d3f5e655e0ba7bd192af37ff
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Thu May 23 11:03:25 2013 -0700

    quick_dump: Add CCID

before I was ready, in order to get the mmio fix in. This fixes a parse
error in quick_dump.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-05-23 11:17:31 -07:00
Ben Widawsky
a08d62257d quick_dump: Add CCID
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-05-23 11:03:25 -07:00
Ben Widawsky
1109c5acfd quick_dump: Add basic haswell support
Mostly using the IVB registers + a few I grabbed from i915_reg.h

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-05-22 16:15:04 -07:00
Ben Widawsky
099a92ea28 quick_dump: Add more ring registers
START + CTL (and reorder them in the file)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-05-22 15:54:53 -07:00
Damien Lespiau
cc6c254ae9 reg_dumper: Shut a warning down
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-05-08 13:34:39 +01:00
Damien Lespiau
ec3e7a66f0 Update .gitignore files with the new tests and tools
Also sort them.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-05-08 13:34:31 +01:00
Ben Widawsky
8be812b86c intel_mmio: Add intel_register_access_needs_fakewake
I screwed this up in my recent patch:
commit c7b6ec50007e2e524a208572c34faf1380eeab1b
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Wed Apr 24 19:05:18 2013 -0700

    clean warnings: Silence unused (or private) functions

I've clarified the functions now, and added the proper call from the
python script.

Time to get a regression tester for our tools?

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-26 14:34:48 -07:00
Jesse Barnes
d6917cf72d add punit and nc read/write tools for vlv
Good for testing/debugging.
2013-04-25 14:43:23 -07:00
Ben Widawsky
afeb43190e intel_error_decode: HEAD stuff
Show the decoded HEAD value, as well as print the calculated head offset
per ringbuffer.

This will be superceded in the next commit, but that patch is way more
complicated than this one (read: error prone), so I want this here.

Example:
ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950

v2: Actually make it work for all rings.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:55 -07:00
Ben Widawsky
155aa1e1fa intel_error_decode: Whitespacing fix
The rest of igt has moved to kernel coding style. People had already
been not conforming with the existing formatting in error decode, so we
may as well fix it.

This addresses two primary issues, tabbing (remove spaces), and space
after function in function call. I may have missed some of the latter
since that was done by hand.

I have upcoming work in this file, and it was annoying me.

v2: Fix case alignment (Chris)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:45 -07:00
Ben Widawsky
6f0d8b011e quick_dump: Add dpio read
The sample usage is in reg_access.dpio_read(). We should add some
semantics to the text files to detect DPIO registers, and do the right
thing.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-17 19:02:41 +02:00
Ben Widawsky
a59b0ee5d4 reg_access: Forcewake as necessary
Don't try to be smart. Just poke all forcewake bits if it seems we need
it.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
67ed990604 quick_dump: add register write
Since there is no command line support, just do a pure integer version

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
ec107b0194 quick_dump: say something when reg init fails
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Jesse Barnes
0b7da0afb1 fixup VLV reg offsets, add a few more 2013-04-16 13:41:23 -07:00