8 Commits

Author SHA1 Message Date
Daniel Vetter
9f6365e4ea lib/drmtest: Add drmtest_subtest_block macro
Doesn't do more than an if (drmtest_run_test(name)) right now, but
as soon as we get a bit of infrastructure to handle test failures and
skipping, this will get more interesting.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-08-12 11:10:26 +02:00
Damien Lespiau
5fa15f79d0 tests: Black list tests we don't want to run on simulation
Let's start by a small set of tests, to eventually consider running
more.

The current list should then be:

gem_mmap
gem_pread_after_blit
gem_ring_sync_loop
gem_ctx_basic
gem_pipe_control_store_loop
gem_storedw_loop_render
gem_storedw_loop_blt
gem_storedw_loop_bsd
gem_render_linear_blits
gem_tiled_blits
gem_cpu_reloc

gem_exec_nop
gem_mmap_gtt

v2 add (Daniel Vetter)
gem_exec_bad_domains
gem_exec_faulting_reloc
gem_flink
gem_reg_read
gem_reloc_overflow
gem_tiling_max_stride
prime_*

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-07-18 15:49:02 +01:00
Chris Wilson
4fd34977af test/gem_(cpu|gtt)_concurrent_blit: Move the set_bo() from create to the test
Hiding the initial set_bo() required for the "overwrite-source" tests
lead to a nice bit of hilarity as I missed repeating the initialisation
for the multiple loops of the interruptible version of
"overwrite-source".

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 17:07:51 +01:00
Chris Wilson
4c6f2d4e0c tests/gem_(cpu|gtt)_concurrent_blit: Restore the old tests and add the new interruptible as new tests
Daniel preferred to keep the old tests intact lest we accidentally break
them, and to add the new interruptible tests as new subtests.

In the process also make sure the GPU is idle before starting each loop.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 16:49:05 +01:00
Chris Wilson
95426dc206 tests/gem_(cpu|gtt)_concurrent_blit: Enable signals
In order to exercise the bug behind:

commit 22fd5ca947b58901927d100d2b1aa0f1672b3435
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Jun 28 16:54:08 2013 +0100

    drm/i915: Only clear write-domains after a successful wait-seqno

we need to check for concurrent access with the potential to be
interrupted by a signal. The framework for doing so is already in place,
so just enable it and repeat the tests for longer to give better chance
of being interrupted at just the wrong moment.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-29 16:37:20 +01:00
Daniel Vetter
a2778575d5 tests/gem_gtt_concurrent_blit: convert to subtest infrastructure
Same treatment as for gem_cpu_concurrent_blit.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-11-28 12:35:03 +01:00
Daniel Vetter
d9fb72e266 tests: improve concurrent blit tests
By adding another testcase that follows up with a gpu read. This
checks whether the kernel properly tracks the pending write and
doesn't lose it (or sync up to the wrong seqno).

For some odd reason only the cpu mmap variant blows up, the gtt one
works here. I need to look into that some more.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-13 10:35:11 +02:00
Daniel Vetter
8f6ebd4ac0 tests: add gem_gtt_concurrent_blit
Same test as Chris Wilson's gem_cpu_concurrent_blit, but for
gtt mmaps.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-04-11 15:28:26 +02:00