1343 Commits

Author SHA1 Message Date
Xiang, Haihao
96baf59f3e tests: storedw on VEBOX
v2 (Ben): Define LOCAL_I915_EXEC_VEBOX
Small copyright fixes

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhong Li <zhong.li@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-24 18:56:10 -07:00
Xiang, Haihao
f187990bbf gem_ring_sync_loop: test the new ring
The code is surround by a #ifdef...#endif to avoid to break compiling against
the current libdrm release

v2 (Ben): Use VEBOX get param. Thankfully Daniel let us carve this out
way back when.
Spacing cleanups

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhong Li <zhong.li@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-24 18:55:16 -07:00
Xiang, Haihao
0a413cd8a9 gem_ring_sync_loop: check the rings supported by the kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhong Li <zhong.li@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-24 18:23:00 -07:00
Ben Widawsky
afeb43190e intel_error_decode: HEAD stuff
Show the decoded HEAD value, as well as print the calculated head offset
per ringbuffer.

This will be superceded in the next commit, but that patch is way more
complicated than this one (read: error prone), so I want this here.

Example:
ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950

v2: Actually make it work for all rings.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:55 -07:00
Ben Widawsky
155aa1e1fa intel_error_decode: Whitespacing fix
The rest of igt has moved to kernel coding style. People had already
been not conforming with the existing formatting in error decode, so we
may as well fix it.

This addresses two primary issues, tabbing (remove spaces), and space
after function in function call. I may have missed some of the latter
since that was done by hand.

I have upcoming work in this file, and it was annoying me.

v2: Fix case alignment (Chris)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23 09:20:45 -07:00
Imre Deak
70afbead46 tests/prime_self_import: add subtest to export/import a second gem buffer
Also add a subtest for the fd=handle_to_fd(), fd2=dup(fd), close(fd)
case (idea from Kristian Høgsberg).

Signed-off-by: Imre Deak <imre.deak@intel.com>

v2:
- add a new subtest instead of modifying the original test (Daniel)
- add a new subtest for testing dup (Kristian)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-17 22:40:13 +02:00
Ben Widawsky
6f0d8b011e quick_dump: Add dpio read
The sample usage is in reg_access.dpio_read(). We should add some
semantics to the text files to detect DPIO registers, and do the right
thing.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-17 19:02:41 +02:00
Ben Widawsky
a59b0ee5d4 reg_access: Forcewake as necessary
Don't try to be smart. Just poke all forcewake bits if it seems we need
it.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
67ed990604 quick_dump: add register write
Since there is no command line support, just do a pure integer version

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
f60dd51535 intel_mmio: a query for forcewake requirement
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
8904d29416 intel_mmio: Allow mmio without debugfs
With the introduction of the forcewake dance:

commit cac8f8b52621f246a7cff412f340a7db28cb1b99
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Thu Jul 28 13:40:19 2011 -0700

    forcewake: Add mmio code to do proper forcewake stuff for gen6

We lost the ability to do register access when either debugfs isn't
mounted, or when the driver isn't loaded. The latter can be beneficial
in debugging situations.

This patch will allow the driver to still do mmio (leaving forcewake
management up to the callers) provided that the i915 driver appears to
not be loaded (according to sysfs)

Requested by Jesse.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Ben Widawsky
ec107b0194 quick_dump: say something when reg init fails
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-16 14:06:02 -07:00
Jesse Barnes
0b7da0afb1 fixup VLV reg offsets, add a few more 2013-04-16 13:41:23 -07:00
Jesse Barnes
25339595a7 add VLV punit & north cluster read tools 2013-04-16 13:41:23 -07:00
Ville Syrjälä
2fe3f76c25 tests/gem_fenced_exec_thrash: Test with > max fences
Make sure the kernel returns EDEADLK when the number of fences is
exceeded for gen2-3. For gen4+ the test makes sure the kernel ignores
the EXEC_OBJECT_NEEDS_FENCE flag.

Note that I changed the code not to round the num_fences to an even
number. Not sure why that was there, and if there's a reason for it,
we need to add it back.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-11 20:01:54 +02:00
Mika Kuoppala
a7ca33b673 tests/gem_seqno_wrap: verify debugfs write with readback
Make sure that debugfs entry works as expected by reading
back the sequence number that was written.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-11 17:26:56 +02:00
Ville Syrjälä
918e763e2d tests/gem_tiling_max_stride: Add a test for max fence stride
gem_tiling_max_stride writes a data pattern to an X-tiled buffer using
the maximum supported stride, reads the data back as linear, and
verifies that the data didn't get scrambled on the way.

The test also checks that some invalid stride values are rejected
properly.

v2: Check invalid strides
v3: Check invalid stride with Y-tiling
    Include a few more invalid stride values
    Fix gen3 X-tile size
v4: A few more invalid strides :)
    Drop the useless memset()

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-09 20:21:13 +02:00
Ville Syrjälä
1d1f68316f tests: Use gem_available_fences()
lib/drmtest.c provides gem_available_fences(). Use it where
appropriate.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-09 20:21:13 +02:00
Ville Syrjälä
e37eb35e19 tests/gem_fenced_exec_thrash: Increase MAX_FENCES to 32
IVB+ supports 32 fence registers, bump the maximum in the test.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-09 20:21:13 +02:00
Paulo Zanoni
b0c63a781d intel_reg_dumper: improve the dumping of backlight registers
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-04-09 13:52:54 -03:00
Ben Widawsky
d6dd0bcb1c m4: Updates to ax_python_devel.m4
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-08 10:50:57 -07:00
Daniel Vetter
0a8bfbf747 tests/gem_fence_trash: make threaded tests more through-rough
With this at least the y-tiled test reliably fails on my machines, but
x-tiled still passes on some. More ideas to tune this highly welcome.

v2: Fill cpu caches with data for each newly allocated bo. This seems
to do the trick on my snb here _really_ reliably. So apparently the
backsnoop for llc gtt writes is the crucial ingredient here to make
the test fail.

While at it, also stop leaking mmap space.

v3: Fixup commit message.

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-08 09:47:58 +02:00
Daniel Vetter
cb3a44fa26 lib/drmtest: tune down signal handler stats
Avoids tests with a spurious WARN result in piglit.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-08 00:31:06 +02:00
Daniel Vetter
1677c21291 tests/kms_flip: don't leak gpu hang state
We need to clear out the error_state. While at it also make sure that
the hang was indeed detected.

Whoever writes the next test to race against gpu hangs should probably
extract these two functions into the drmtest library. Which just one
user that's not really worth it right now.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-06 18:30:19 +02:00
Daniel Vetter
c97a45ff09 tests/prime_udl: skip harder
I fail.
2013-04-04 11:36:27 +02:00
Daniel Vetter
d16dd3a0f8 tests/prime_udl: proper return values
... especially skip properly if there's no udl device.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-04 11:06:37 +02:00
Daniel Vetter
16e44f5499 lib: fixup register access on gen2/3
This wreaked havoc with intel_reg_dumper since it's been broken in

commit c6fe31bc473a7ae44bc42bad7da5faca3c924821
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date:   Thu Jun 21 14:31:34 2012 -0300

    intel_reg_dumper: use intel_register_access_init/fini

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-03 00:22:41 +02:00
Chris Wilson
74f6e413d3 gem_fence_thrash: Fix array allocation size for LP64 systems 2013-03-27 11:33:24 +00:00
Kenneth Graunke
43a0862697 intel_perf_counters: Add support for Sandybridge.
While the Sandybridge PRM doesn't have any documentation on the GPU's
performance counters, a lot of information can be gleaned from the older
Ironlake PRM.  Oddly, none of the information documented there actually
appears to apply to Ironlake.  However, it apparently works just great
on Sandybridge.

Since this information has all been publicly available on the internet
for around three years, we can use it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-27 12:28:52 +01:00
Kenneth Graunke
0811556747 intel_perf_counters: Abstract out Ironlake-specific code.
We want to support this tool on more platforms.  This lays the
groundwork for making that possible.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-27 12:28:45 +01:00
Eric Anholt
85667f4f7d intel_perf_counters: a little tool for dumping performance counters.
This reads the GPU's performance counters via MI_REPORT_PERF_COUNT and
prints them in a top-style interface.  While it can be useful in and of
itself, it also documents the performance counters and lets us verify
that they're working.

Currently, it only supports Ironlake.

v2 [Ken]: Rebase on master and fix compilation failures; make it abort
on non-Ironlake platforms to avoid GPU hangs; rename from 'chaps' to
intel_perf_counters since that acronym isn't used any longer; write the
above commit message.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-27 12:28:41 +01:00
Daniel Vetter
9535fed171 tests/Makefile.am: gem_fence_trash has grown subtests
Need to move it to the right make target now!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-27 12:26:46 +01:00
Mika Kuoppala
ee79b8fccd tests: add write-verify test to gem_fence_thrash
Add write-verify test to gem_fence_thrash. Test will create
multiple threads per fence then verify the write into fenced region.

v2: non-threaded, non-tiled tests added. suggested by Chris Wilson.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-27 12:23:58 +01:00
Paulo Zanoni
7253eb4e4f intel_reg_dumper: debug SDEISR on Haswell
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
1043b22bb0 lib: fix HAS_PCH_SPLIT check
So HAS_PCH_SPLIT on't be true on VLV.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
051e327247 intel_reg_dumper: dump HSW watermark registers
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
eb88ce64b7 intel_reg_dumper: decode some useful Haswell registers
I've checked the value of these registers many many many times during
development.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
5c0ce0f2a9 intel_reg_dumper: make Haswell dump useful
It was previously printing ironlake_debug_regs and haswell_debug_regs.
Since ironlake_debug_regs contains a lot of registers that don't exist
on Haswell, running intel_reg_dumper on Haswell caused "unclaimed
register" messages. Now I've copied the existing registers from
ironlake_debug_regs to haswell_debug_regs, so we won't print the
registers that don't exist anymore.

Also removed DP_TP_STATUS_A since it doesn't exist.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
2fadf695ff intel_reg_dumper: recognize LPT
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Paulo Zanoni
29abdb96dc lib: detect PCH_LPT and PCH_NONE
So we don't assign PCH_IBX to anything that's not PCH_CPT nor PCH_LPT.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2013-03-22 14:45:06 -03:00
Kees Cook
c3bfd738c7 tests: add gem_reloc_overflow to check wrapping
This adds a test to make sure that the execbuffer validation routine is
checking for invalid addresses, single entry overflow, and multi-entry
wrapping overflow.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-22 12:19:58 +01:00
Ville Syrjälä
7da0af8855 kms_flip: Don't access freed data
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-22 12:19:57 +01:00
Ville Syrjälä
069e35e0fc kms_flip: Add flip-vs-bad-tiling test
flip-vs-bad-tiling tests that page flipping to a Y-tiled buffer returns
an error correctly, rather than triggering kernel BUG for instance.

Create a third fb for this purpose. After the fb has been created,
change its tiling mode to Y. When performing a flip, target this
Y-tiled fb and make sure we get the expected error value.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-22 12:19:57 +01:00
Ville Syrjälä
7ab8e53b5d kms_flip: Add a flip-vs-panning-vs-hang test
The flip-vs-panning-vs-hang is just like the regular flip-vs-panning
test, except it also hangs the GPU. This will test whether panning
works after a pending page flip has been cancelled by a GPU reset,
and also whether page flip events get delivered correctly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-22 12:19:57 +01:00
Ville Syrjälä
1f5957c64e kms_flip: Split the "no events" logic into a separate flag
Do not use the TEST_HANG flag to determine whether page flip events are
used. Add a new TEST_NOEVENT flag that can be used to disable the use
of events instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-03-22 12:19:57 +01:00
Damien Lespiau
c6c6f0f593 lib: Add a comment about why we only parse long options for subtests
For thet next one wondering about that.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-22 11:08:17 +00:00
Damien Lespiau
764b9e503e build: Fix typo if the test setting enable_debugger
Of course, a 'x' need to be inserted there.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:59:00 +00:00
Damien Lespiau
4591991769 assembler: Mark format() as PRINTFLIKE in the disassembler
So when making changes in code using that function, we get warnings
about mismatches between the format string and arguments.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
92262e1ff8 assembler: Fix the decoding of the destination horizontal stride
dest_horizontal_stride needs go through the horiz_stride[] indirection
to pick up the rigth stride when its value is 11b (4 elements).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00
Damien Lespiau
d9afa5bfea assembler: Group the header inclusions together
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04 15:54:42 +00:00