16 Commits

Author SHA1 Message Date
Daniel Vetter
018f8c3c45 lib: s/drmtest_dumb_aub/igt_aub_dump_enabled/
This is prep work to extract a new igt aux library with all kinds
of random stuff. Also give it a bit a more suitable name to
indicate that this is just a flag and doesn't do the aub dumping
itself.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 22:42:35 +01:00
Daniel Vetter
c03c6ceb29 lib: rename intel_gpu_tools.h to intel_io.h
With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 21:34:29 +01:00
Daniel Vetter
6cfcd71589 lib: remove uncessary #includes from headers
Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.

One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 20:08:13 +01:00
Daniel Vetter
83a4c7d3eb lib/intel_batchbuffer: igt_ namespace for the buffer structure
Step one to properly namespace the rendercpy/mediafill functions. Als
give the buf_height/width helpers a proper igt_ prefix.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 15:44:48 +01:00
Daniel Vetter
7dc0001f3d lib: make rendercopy.h an internal header
And move the public interfaces into intel_batchbuffer.[hc].

A bit messy since we are fairly inconsistent with our header #include
handling.

Also exclude rendercopy.h from the documentation.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 15:31:15 +01:00
Kenneth Graunke
f034817b40 rendercopy/bdw: Fix length of a bunch of zeroed out packets.
A bunch of packets were too short.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
2013-12-10 11:37:19 +00:00
Kenneth Graunke
fdbdc7f325 rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
We don't want depth/stencil fast clears or HiZ resolves; we want normal
drawing.  Without this, the pixel pipeline doesn't work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
2013-12-10 11:36:23 +00:00
Xiang, Haihao
adbd83cdc3 rendercopy/bdw: Set Instruction Buffer size Modify Enable to 1
Otherwise it may result in GPU hang

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-12-06 13:01:25 +00:00
Damien Lespiau
34f104aed7 rendercopy/bdw: Fix the 3DSTATE_STENCIL_BUFFER instruction length
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-11-28 14:33:37 +00:00
Damien Lespiau
09f144b649 rendercopy/bdw: Fix the 3DSTATE_HIER_DEPTH_BUFFER instruction length
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-11-28 14:33:37 +00:00
Damien Lespiau
e824fdd033 rendercopy/bdw: Fix the various 3DSTATE_CONSTANT_* instruction length
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-11-28 14:33:37 +00:00
Damien Lespiau
ffff68f08a rendercopy/bdw: Fix the STATE_SIP instruction length
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-11-28 14:33:37 +00:00
Ville Syrjälä
725da6ee74 rendercopy: Pass context to rendercopy functions
rendercopy does the batch buffer flush internally, so if we want
to use it with multiple contexts, we need to pass the context
in from caller.

v2: Modify rendercopy_gen8 as well

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-11-27 16:21:28 +02:00
Damien Lespiau
c82872b019 rendercopy/bdw: Add AUB annotations for states
This will hopefully help debugging things.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2013-11-06 09:39:41 -08:00
Damien Lespiau
91e5897246 rendercopy/bdw: Fix the original implementation
For posterity, I've squashed these commits against Damien's request.

rendercopy/gen8: Fix the include guards

rendercopy/gen8: Update the 3DSTATE_MULTISAMPLE opcode

The opcode has changed in BDW.

rendercopy/gen8: Add the VF_TOPOLOGY state

The primitive type has moved out of the 3DPRIMITIVE to its own state,
VF_TOPOLOGY.

rendercopy/gen8: Fixup 3STATE_PS

Update the state to the latest BSpec, in particular the thread count was
using a wrong shift and we were missing kernel2 offset.

rendercopy/gen8: Update 3DSTATE_BASE_ADDRESS

This state has seen its fields moved around a bit, follow the BSpec.

rendercopy/gen8: Allocate 64 VUEs

The simulator screams at us if we try to allocate less than that.

rendercopy/gen8: Surface states have to be 64 bytes a aligned

rendercopy/gen8: Vertical/horizontal align 2 does not exist any more

So set them to 4. This should not matter with rendercopy (which is not
using compressed textures), but it makes the simulator moan.

rendercopy/gen8: Make sure the vertex buffer is 8 bytes aligned

rendercopy/gen8: Adjust 3DSTATE_VERTEX_BUFFERS for gen8

The address of the buffer is now on 48 bits. Also the size was computed
as offset + size where the field is really the size of the buffer
itself, not the end address.

rendercopy/gen8: Update the SF/SBE states for gen8

gen8 has a few changes around those states and a new ones RASTER and
SBE_SWIZ.

rendercopy/gen8: Add the PS_EXTRA and PS_BLEND states

rendercopy/gen8: Fix building with DEBUG_RENDERCOPY defined

The forward declaration was missing the final ';'. Let's move the whole
function at the top instead.

rendercopy/gen8: Update the PS and CONSTANT_PS states

rendercopy/gen8: Fix the red channel selection

Make it output red.

rendercopy/gen8: Update the write -1 shader

With the latest assembler changes from Haihao.

rendercopy/gen8: Remove blit.g8a

There is no diff between this file and blig.g7a. Remove it.

rendercopy/gen8: Fix the surface relocation offset

The surface base address is now at dwords 8/9 so the relocation has to
mirror the change.

rendercopy/gen8: Add the VF_INSTANCING state

Should work without, but doesn't hurt to add it.

rendercopy/gen8: Set the Attribule enable field in PS_EXTRA

When the SF is set up to output some attributes, the pixel shader also
have to be told there's attributes to care about.

rendercopy/gen8: Set the force bits to read URB offset/length

If we want to override the URB offset/length in the SBE state itself, we
need to set the force bits on (new in gen8)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06 09:39:41 -08:00
Jesse Barnes
3edfff16cd rendercopy/bdw: Initial gen8 rendercopy
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2013-11-06 09:39:41 -08:00