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rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
We don't want depth/stencil fast clears or HiZ resolves; we want normal drawing. Without this, the pixel pipeline doesn't work. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Damien Lespiau <damien.lespiau@intel.com>
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@ -22,6 +22,8 @@
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# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
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# define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16 (4 << 1)
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#define GEN8_3DSTATE_WM_HZ_OP GEN6_3D(3, 0, 0x52)
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#define GEN8_3DSTATE_VF_INSTANCING GEN6_3D(3, 0, 0x49)
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#define GEN7_3DSTATE_GS GEN6_3D(3, 0, 0x11)
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#define GEN7_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16)
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@ -678,8 +678,18 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
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OUT_BATCH(0);
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}
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static void
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gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) {
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OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2));
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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}
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static void
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gen8_emit_null_state(struct intel_batchbuffer *batch) {
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gen8_emit_wm_hz_op(batch);
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gen8_emit_hs(batch);
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OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
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OUT_BATCH(0);
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