rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.

We don't want depth/stencil fast clears or HiZ resolves; we want normal
drawing.  Without this, the pixel pipeline doesn't work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Kenneth Graunke 2013-12-09 23:29:35 -08:00 committed by Damien Lespiau
parent 8cd3a9d543
commit fdbdc7f325
2 changed files with 12 additions and 0 deletions

View File

@ -22,6 +22,8 @@
# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
# define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16 (4 << 1)
#define GEN8_3DSTATE_WM_HZ_OP GEN6_3D(3, 0, 0x52)
#define GEN8_3DSTATE_VF_INSTANCING GEN6_3D(3, 0, 0x49)
#define GEN7_3DSTATE_GS GEN6_3D(3, 0, 0x11)
#define GEN7_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16)

View File

@ -678,8 +678,18 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
OUT_BATCH(0);
}
static void
gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
}
static void
gen8_emit_null_state(struct intel_batchbuffer *batch) {
gen8_emit_wm_hz_op(batch);
gen8_emit_hs(batch);
OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
OUT_BATCH(0);