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skl_compute_wrpll: Prefer even dividers

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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2015-05-07 18:17:32 +01:00
parent b3ef2986ca
commit cb57cdc632
1 changed files with 7 additions and 0 deletions
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7
tools/skl_compute_wrpll.c
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@ -431,6 +431,13 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */,
dco_freq, dco_freq,
p); p);
} }
/*
* If a solution is found with an even divider, prefer
* this one.
*/
if (d == 0 && ctx.p)
break;
} }
} }