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quick_dump: Add VLV DPIO registers

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Add the names of all VLV DPIO registers.

v2: Use the third element to signal DPIO registers, and split
    the code changes to a separate patch

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Ville Syrjälä
2013-06-26 20:57:34 +03:00
committed by Ben Widawsky
parent e87c2536f6
commit b84b9e230c
3 changed files with 55 additions and 1 deletions
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tools/quick_dump/Makefile.am
+1 -1
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@@ -25,7 +25,7 @@ EXTRA_DIST = \
base_display.txt base_interrupt.txt base_other.txt base_power.txt base_rings.txt \
gen6_other.txt sandybridge \
gen7_other.txt ivybridge \
vlv_display.txt valleyview \
vlv_display.txt vlv_dpio.txt valleyview \
quick_dump.py \
reg_access.py \
chipset.i chipset.py