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Enable compilation on non-Intel, non-DRM systems.

Browse Source 
A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
2010-04-08 11:56:57 +01:00
parent cd64e19329
commit 95374225e8
29 changed files with 309 additions and 246 deletions
Download Patch File Download Diff File Expand all files Collapse all files
tests/gem_bad_address.c
-1
View File
@@ -65,7 +65,6 @@ int main(int argc, char **argv)
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
tests/gem_bad_batch.c
-1
View File
@@ -61,7 +61,6 @@ int main(int argc, char **argv)
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
tests/gem_bad_blit.c
+4 -3
View File
@@ -63,7 +63,7 @@ struct intel_batchbuffer *batch;
#define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */
static void
bad_blit(drm_intel_bo *src_bo)
bad_blit(drm_intel_bo *src_bo, uint32_t devid)
{
uint32_t src_pitch = 512, dst_pitch = 512;
uint32_t cmd_bits = 0;
@@ -100,10 +100,11 @@ bad_blit(drm_intel_bo *src_bo)
int main(int argc, char **argv)
{
drm_intel_bo *src;
uint32_t devid;
int fd;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@@ -111,7 +112,7 @@ int main(int argc, char **argv)
src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
bad_blit(src);
bad_blit(src, devid);
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
tests/gem_pread_after_blit.c
+7 -6
View File
@@ -131,9 +131,10 @@ main(int argc, char **argv)
drm_intel_bo *src1, *src2, *bo;
uint32_t start1 = 0;
uint32_t start2 = 1024 * 1024 / 4;
uint32_t devid;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@@ -146,21 +147,21 @@ main(int argc, char **argv)
/* First, do a full-buffer read after blitting */
printf("Large read after blit 1\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
printf("Large read after blit 2\n");
intel_copy_bo(batch, bo, src2, width, height);
intel_copy_bo(batch, bo, src2, width, height, devid);
verify_large_read(bo, start2);
printf("Small reads after blit 1\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_small_read(bo, start1);
printf("Small reads after blit 2\n");
intel_copy_bo(batch, bo, src2, width, height);
intel_copy_bo(batch, bo, src2, width, height, devid);
verify_small_read(bo, start2);
printf("Large read after blit 3\n");
intel_copy_bo(batch, bo, src1, width, height);
intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
drm_intel_bo_unreference(src1);
tests/gem_ringfill.c
+3 -2
View File
@@ -55,11 +55,12 @@ static const int size = 1024 * 1024;
int main(int argc, char **argv)
{
int fd;
uint32_t devid;
int i;
drm_intel_bo *src_bo, *dst_bo;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@@ -84,7 +85,7 @@ int main(int argc, char **argv)
* doing this, we aren't likely to with this test.
*/
for (i = 0; i < 128 * 1024 / (8 * 4) * 1.25; i++) {
intel_copy_bo(batch, dst_bo, src_bo, width, height);
intel_copy_bo(batch, dst_bo, src_bo, width, height, devid);
intel_batchbuffer_flush(batch);
}
tests/gem_tiled_blits.c
+5 -45
View File
@@ -60,47 +60,7 @@
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static int width = 512, height = 512;
static void
copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
static uint32_t devid;
static drm_intel_bo *
create_bo(uint32_t start_val)
@@ -126,7 +86,7 @@ create_bo(uint32_t start_val)
}
drm_intel_bo_unmap(linear_bo);
copy_bo(bo, linear_bo);
intel_copy_bo (batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
@@ -142,7 +102,7 @@ check_bo(drm_intel_bo *bo, uint32_t start_val)
linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
copy_bo(linear_bo, bo);
intel_copy_bo(batch, linear_bo, bo, width, height, devid);
drm_intel_bo_map(linear_bo, 0);
linear = linear_bo->virtual;
@@ -171,7 +131,7 @@ int main(int argc, char **argv)
int i;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@@ -196,7 +156,7 @@ int main(int argc, char **argv)
if (src == dst)
continue;
copy_bo(bo[dst], bo[src]);
intel_copy_bo(batch, bo[dst], bo[src], width, height, devid);
bo_start_val[dst] = bo_start_val[src];
/*
tests/gem_tiled_pread.c
+5 -45
View File
@@ -58,49 +58,8 @@ static const int size = 1024 * 1024;
#define PAGE_SIZE 4096
static void
copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
{
uint32_t src_tiling, dst_tiling, swizzle;
uint32_t src_pitch, dst_pitch;
uint32_t cmd_bits = 0;
drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
src_pitch = width * 4;
if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
src_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
}
dst_pitch = width * 4;
if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
dst_pitch /= 4;
cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
}
BEGIN_BATCH(8);
OUT_BATCH(XY_SRC_COPY_BLT_CMD |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
cmd_bits);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
dst_pitch);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
}
static drm_intel_bo *
create_bo(void)
create_bo(uint32_t devid)
{
drm_intel_bo *bo, *linear_bo;
uint32_t *linear;
@@ -122,7 +81,7 @@ create_bo(void)
linear[i] = val++;
drm_intel_bo_unmap(linear_bo);
copy_bo(bo, linear_bo);
intel_copy_bo(batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
@@ -163,19 +122,20 @@ int
main(int argc, char **argv)
{
int fd;
uint32_t devid;
drm_intel_bo *bo;
int i, iter = 100;
uint32_t buf[width * height];
uint32_t tiling, swizzle;
fd = drm_open_any();
intel_get_drm_devid(fd);
devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
bo = create_bo();
bo = create_bo(devid);
drm_intel_bo_get_tiling(bo, &tiling, &swizzle);