assembler: Add support for D and UD in 3-src instructions

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau
2013-01-31 01:27:36 +00:00
parent a2a6583518
commit 67f3f949bf
2 changed files with 24 additions and 4 deletions
+5
View File
@@ -785,6 +785,11 @@ enum opcode {
#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
#define BRW_REGISTER_TYPE_F 7
#define BRW_REGISTER_3SRC_TYPE_F 0
#define BRW_REGISTER_3SRC_TYPE_D 1
#define BRW_REGISTER_3SRC_TYPE_UD 2
#define BRW_REGISTER_3SRC_TYPE_DF 3
#define BRW_ARF_NULL 0x00
#define BRW_ARF_ADDRESS 0x10
#define BRW_ARF_ACCUMULATOR 0x20